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W11 CPU core and support modules
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sysmonrbuslib.vhd
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1-- $Id: sysmonrbuslib.vhd 1181 2019-07-08 17:00:50Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2016-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Package Name: sysmonrbuslib
7-- Description: generic (all with SYSMON or XADC)
8--
9-- Dependencies: -
10-- Tool versions: viv 2015.4-2019.1; ghdl 0.33-0.35
11-- Revision History:
12-- Date Rev Version Comment
13-- 2016-05-28 770 1.0.1 ensure to_unsigned() has a type natural argument
14-- 2016-03-13 742 1.0 Initial version
15-- 2016-03-06 738 0.1 First draft
16------------------------------------------------------------------------------
17
18library ieee;
19use ieee.std_logic_1164.all;
20use ieee.numeric_std.all;
21
22use work.slvtypes.all;
23use work.rblib.all;
24
25package sysmonrbuslib is
26
27subtype bv is bit_vector; -- vector
28subtype bv16 is bit_vector(15 downto 0); -- 16 bit word
29
30-- config reg #0 fields as bit masks (to be or'ed)
31constant xadc_conf0_cavg: bv16 := x"8000"; -- 15 dis calib avr
32constant xadc_conf0_avg_off: bv16 := x"0000"; -- 13:12 avr mode: off
33constant xadc_conf0_avg_16: bv16 := x"1000"; -- " avr mode: 16 samples
34constant xadc_conf0_avg_64: bv16 := x"2000"; -- " avr mode: 64 samples
35constant xadc_conf0_avg_256: bv16 := x"3000"; -- " avr mode: 256 samples
36constant xadc_conf0_mux: bv16 := x"0800"; -- 11 ena ext mux
37constant xadc_conf0_bu: bv16 := x"0400"; -- 10 ena bipolar
38constant xadc_conf0_ec: bv16 := x"0200"; -- 9 ena event mode
39constant xadc_conf0_acq: bv16 := x"0100"; -- 8 ena inc settle
40-- bit 4:0 holds channel select, not used, only for single channel mode
41
42-- config reg #1 fields as bit masks (to be or'ed)
43constant xadc_conf1_seq_default: bv16 := x"0000"; -- 15:12 seq mode: default
44constant xadc_conf1_seq_spass: bv16 := x"1000"; -- " seq mode: single pass
45constant xadc_conf1_seq_cont: bv16 := x"2000"; -- " seq mode: continuous
46constant xadc_conf1_seq_schan: bv16 := x"3000"; -- " seq mode: single chan
47constant xadc_conf1_dis_alm6: bv16 := x"0800"; -- 11 dis alm(6)
48constant xadc_conf1_dis_alm5: bv16 := x"0400"; -- 10 dis alm(5)
49constant xadc_conf1_dis_alm4: bv16 := x"0200"; -- 9 dis alm(4)
50constant xadc_conf1_dis_alm3: bv16 := x"0100"; -- 8 dis alm(3)
51
52constant xadc_conf1_cal3_supog: bv16 := x"0080"; -- 7 ena sup off+gain
53constant xadc_conf1_cal2_supo: bv16 := x"0040"; -- 6 ena sup off
54constant xadc_conf1_cal1_adcog: bv16 := x"0020"; -- 5 ena adc off+gain
55constant xadc_conf1_cal0_adco: bv16 := x"0010"; -- 4 ena adc off
56
57constant xadc_conf1_dis_alm2: bv16 := x"0008"; -- 3 dis alm(2)
58constant xadc_conf1_dis_alm1: bv16 := x"0004"; -- 2 dis alm(1)
59constant xadc_conf1_dis_alm0: bv16 := x"0002"; -- 1 dis alm(0)
60constant xadc_conf1_dis_ot: bv16 := x"0001"; -- 0 dis ot
61
62-- bit numbers for sequence registers (even word for build-in channels)
63constant xadc_select_vccbram: integer := 14;
64constant xadc_select_vrefn: integer := 13;
65constant xadc_select_vrefp: integer := 12;
66constant xadc_select_vpvn: integer := 11;
67constant xadc_select_vccaux: integer := 10;
68constant xadc_select_vccint: integer := 9;
69constant xadc_select_temp: integer := 8;
70constant xadc_select_vccoddr: integer := 7;
71constant xadc_select_vccpaux: integer := 6;
72constant xadc_select_vccpint: integer := 5;
73constant xadc_select_calib: integer := 0;
74
75-- defaults for plain build-in power monitoring
78
87
89 xadc_select_vccaux => '1',
90 xadc_select_vccint => '1',
91 xadc_select_temp => '1',
92 xadc_select_calib => '1',
93 others => '0');
94
95-- OT limit and reset are in general hardwired to 125 and 70 deg
96-- the 4 lsbs of reg 53 contain the 'automatic shutdown enable'
97-- must be set to "0011' to enable. done by default, seems prudent
98constant xadc_init_53_default: bv16 := x"ca33"; -- OT LIMIT (125) + OT ENABLE
99constant xadc_init_57_default: bv16 := x"ae40"; -- OT RESET (70)
100
101constant xadc_init_4a_default: bv16 := (others => '0');
102
103pure function xadc_temp2alim(temp : real) return bv16;
104pure function xadc_svolt2alim (volt : real) return bv16;
105
106component sysmon_rbus_core is -- SYSMON interface to rbus
107 generic (
108 DAWIDTH : positive := 7; -- drp address bus width
109 ALWIDTH : positive := 8; -- alm width
110 TEWIDTH : positive := 12; -- temp width
111 IBASE : slv8 := x"78"; -- base of controller register window
112 RB_ADDR : slv16 := x"fb00");
113 port (
114 CLK : in slbit; -- clock
115 RESET : in slbit := '0'; -- reset
116 RB_MREQ : in rb_mreq_type; -- rbus: request
117 RB_SRES : out rb_sres_type; -- rbus: response
118 SM_DEN : out slbit; -- sysmon: drp enable
119 SM_DWE : out slbit; -- sysmon: drp write enable
120 SM_DADDR : out slv(DAWIDTH-1 downto 0); -- sysmon: drp address
121 SM_DI : out slv16; -- sysmon: data input
122 SM_DO : in slv16; -- sysmon: data output
123 SM_DRDY : in slbit; -- sysmon: data ready
124 SM_EOS : in slbit; -- sysmon: end of scan
125 SM_RESET : out slbit; -- sysmon: reset
126 SM_ALM : in slv(ALWIDTH-1 downto 0);-- sysmon: alarms
127 SM_OT : in slbit; -- sysmon: overtemperature
128 SM_JTAGBUSY : in slbit; -- sysmon: JTAGBUSY
129 SM_JTAGLOCKED : in slbit; -- sysmon: JTAGLOCKED
130 SM_JTAGMODIFIED : in slbit; -- sysmon: JTAGMODIFIED
131 TEMP : out slv(TEWIDTH-1 downto 0) -- die temp
132 );
133end component;
134
135component sysmonx_rbus_base is -- XADC interface to rbus (basic monitor)
136 generic (
137 INIT_TEMP_UP : real := 85.0; -- INIT_50 (default for C grade)
138 INIT_TEMP_LOW : real := 60.0; -- INIT_54
139 INIT_VCCINT_UP : real := 1.05; -- INIT_51 (default for non-L types)
140 INIT_VCCINT_LOW : real := 0.95; -- INIT_55 (default for non-L types)
141 INIT_VCCAUX_UP : real := 1.89; -- INIT_52
142 INIT_VCCAUX_LOW : real := 1.71; -- INIT_56
143 INIT_VCCBRAM_UP : real := 1.05; -- INIT_58 (default for non-L types)
144 INIT_VCCBRAM_LOW : real := 0.95; -- INIT_5C (default for non-L types)
145 CLK_MHZ : integer := 250; -- clock frequency in MHz
146 RB_ADDR : slv16 := x"fb00");
147 port (
148 CLK : in slbit; -- clock
149 RESET : in slbit := '0'; -- reset
150 RB_MREQ : in rb_mreq_type; -- rbus: request
151 RB_SRES : out rb_sres_type; -- rbus: response
152 ALM : out slv8; -- xadc: alarms
153 OT : out slbit; -- xadc: over temp
154 TEMP : out slv12 -- xadc: die temp
155 );
156end component;
157
158component sysmonx_rbus_arty is -- XADC interface to rbus (arty pwrmon)
159 generic (
160 INIT_TEMP_UP : real := 85.0; -- INIT_50 (default for C grade)
161 INIT_TEMP_LOW : real := 60.0; -- INIT_54
162 INIT_VCCINT_UP : real := 0.98; -- INIT_51 (default for -1L types)
163 INIT_VCCINT_LOW : real := 0.92; -- INIT_55 (default for -1L types)
164 INIT_VCCAUX_UP : real := 1.89; -- INIT_52
165 INIT_VCCAUX_LOW : real := 1.71; -- INIT_56
166 INIT_VCCBRAM_UP : real := 0.98; -- INIT_58 (default for -1L types)
167 INIT_VCCBRAM_LOW : real := 0.92; -- INIT_5C (default for -1L types)
168 CLK_MHZ : integer := 250; -- clock frequency in MHz
169 RB_ADDR : slv16 := x"fb00");
170 port (
171 CLK : in slbit; -- clock
172 RESET : in slbit := '0'; -- reset
173 RB_MREQ : in rb_mreq_type; -- rbus: request
174 RB_SRES : out rb_sres_type; -- rbus: response
175 ALM : out slv8; -- xadc: alarms
176 OT : out slbit; -- xadc: over temp
177 TEMP : out slv12; -- xadc: die temp
178 VPWRN : in slv4 := (others=>'0'); -- xadc: vpwr neg (4 chan pwrmon)
179 VPWRP : in slv4 := (others=>'0') -- xadc: vpwr pos (4 chan pwrmon)
180 );
181end component;
182
183end package sysmonrbuslib;
184
185-- ----------------------------------------------------------------------------
186package body sysmonrbuslib is
187
188-- -------------------------------------
189pure function xadc_temp2alim(temp : real) return bv16 is
190 variable ival : natural := 0;
191begin
192 ival := natural(((temp + 273.14) * 16.0 * 4096.0) / 503.975);
193 return to_bitvector(slv(to_unsigned(ival,16)));
194end function xadc_temp2alim;
195
196-- -------------------------------------
197pure function xadc_svolt2alim (volt : real) return bv16 is
198 variable ival : natural := 0;
199begin
200 ival := natural((volt * 16.0 * 4096.0) / 3.0);
201 return to_bitvector(slv(to_unsigned(ival,16)));
202end function xadc_svolt2alim;
203
204
205end package body sysmonrbuslib;
Definition: rblib.vhd:32
std_logic_vector( 3 downto 0) slv4
Definition: slvtypes.vhd:36
std_logic_vector( 11 downto 0) slv12
Definition: slvtypes.vhd:44
std_logic_vector( 15 downto 0) slv16
Definition: slvtypes.vhd:48
std_logic slbit
Definition: slvtypes.vhd:30
std_logic_vector( 7 downto 0) slv8
Definition: slvtypes.vhd:40
std_logic_vector slv
Definition: slvtypes.vhd:31
TEWIDTH positive := 12
out SM_DADDR slv( DAWIDTH- 1 downto 0)
RB_ADDR slv16 := x"fb00"
in RB_MREQ rb_mreq_type
in SM_JTAGMODIFIED slbit
DAWIDTH positive := 7
in SM_ALM slv( ALWIDTH- 1 downto 0)
IBASE slv8 := x"78"
out RB_SRES rb_sres_type
out TEMP slv( TEWIDTH- 1 downto 0)
ALWIDTH positive := 8
in RESET slbit := '0'
bv16 := x"0800" xadc_conf0_mux
bv16 := x"0800" xadc_conf1_dis_alm6
bv16 := x"0080" xadc_conf1_cal3_supog
bv16 := x"0400" xadc_conf1_dis_alm5
bv16 := x"0200" xadc_conf1_dis_alm4
bv16 := x"0001" xadc_conf1_dis_ot
bv16 := x"0004" xadc_conf1_dis_alm1
integer := 11 xadc_select_vpvn
bv16 := x"0008" xadc_conf1_dis_alm2
bit_vector bv
bv16 := x"2000" xadc_conf1_seq_cont
bv16 :=( others => '0') xadc_init_4a_default
bv16 := x"0100" xadc_conf0_acq
integer := 12 xadc_select_vrefp
bv16 := x"0010" xadc_conf1_cal0_adco
bv16 := x"3000" xadc_conf1_seq_schan
bv16 := x"0020" xadc_conf1_cal1_adcog
bv16 := x"0400" xadc_conf0_bu
integer := 0 xadc_select_calib
bv16 := x"ca33" xadc_init_53_default
integer := 6 xadc_select_vccpaux
bv16 := xadc_conf0_cavgor xadc_conf0_avg_16 xadc_init_40_default
bv16 := x"ae40" xadc_init_57_default
bv16 := x"2000" xadc_conf0_avg_64
integer := 7 xadc_select_vccoddr
integer := 14 xadc_select_vccbram
integer := 13 xadc_select_vrefn
bv16 := x"0000" xadc_conf0_avg_off
integer := 5 xadc_select_vccpint
bv16 :=( xadc_select_vccbram=> '1', xadc_select_vccaux=> '1', xadc_select_vccint=> '1', xadc_select_temp=> '1', xadc_select_calib=> '1', others => '0') xadc_init_48_default
integer := 8 xadc_select_temp
integer := 9 xadc_select_vccint
bv16 := x"1000" xadc_conf0_avg_16
bit_vector( 15 downto 0) bv16
bv16 := x"0100" xadc_conf1_dis_alm3
bv16 := xadc_conf1_seq_contor xadc_conf1_dis_alm6or xadc_conf1_dis_alm5or xadc_conf1_dis_alm4or xadc_conf1_cal3_supogor xadc_conf1_cal2_supoor xadc_conf1_cal1_adcogor xadc_conf1_cal0_adco xadc_init_41_default
bv16 := x"1000" xadc_conf1_seq_spass
integer := 10 xadc_select_vccaux
bv16 := x"0040" xadc_conf1_cal2_supo
bv16 := x"3000" xadc_conf0_avg_256
bv16 := x"0000" xadc_conf1_seq_default
bv16 := x"8000" xadc_conf0_cavg
bv16 := x"0002" xadc_conf1_dis_alm0
bv16 := x"0200" xadc_conf0_ec
in VPWRP slv4 :=( others => '0')
INIT_VCCAUX_UP real := 1.89
INIT_TEMP_LOW real := 60.0
CLK_MHZ integer := 250
RB_ADDR slv16 := x"fb00"
in RB_MREQ rb_mreq_type
INIT_TEMP_UP real := 85.0
INIT_VCCINT_LOW real := 0.92
out RB_SRES rb_sres_type
INIT_VCCBRAM_LOW real := 0.92
in VPWRN slv4 :=( others => '0')
in RESET slbit := '0'
INIT_VCCAUX_LOW real := 1.71
INIT_VCCINT_UP real := 0.98
INIT_VCCBRAM_UP real := 0.98
INIT_VCCINT_LOW real := 0.95
INIT_VCCAUX_UP real := 1.89
INIT_VCCBRAM_LOW real := 0.95
INIT_TEMP_LOW real := 60.0
INIT_VCCBRAM_UP real := 1.05
CLK_MHZ integer := 250
RB_ADDR slv16 := x"fb00"
in RB_MREQ rb_mreq_type
INIT_TEMP_UP real := 85.0
INIT_VCCINT_UP real := 1.05
out RB_SRES rb_sres_type
in RESET slbit := '0'
INIT_VCCAUX_LOW real := 1.71