w11 - vhd 0.794
W11 CPU core and support modules
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sysmonx_rbus_arty Entity Reference
Inheritance diagram for sysmonx_rbus_arty:
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Collaboration diagram for sysmonx_rbus_arty:
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Entities

syn  architecture
 

Libraries

ieee 
unisim 

Use Clauses

std_logic_1164 
numeric_std 
vcomponents 
slvtypes  Package <slvtypes>
rblib  Package <rblib>
sysmonrbuslib  Package <sysmonrbuslib>

Generics

INIT_OT_LIMIT  real := 125 . 0
INIT_OT_RESET  real := 70 . 0
INIT_TEMP_UP  real := 85 . 0
INIT_TEMP_LOW  real := 60 . 0
INIT_VCCINT_UP  real := 0 . 98
INIT_VCCINT_LOW  real := 0 . 92
INIT_VCCAUX_UP  real := 1 . 89
INIT_VCCAUX_LOW  real := 1 . 71
INIT_VCCBRAM_UP  real := 0 . 98
INIT_VCCBRAM_LOW  real := 0 . 92
CLK_MHZ  integer := 250
RB_ADDR  slv16 := x " fb00 "

Ports

CLK   in   slbit
RESET   in   slbit := ' 0 '
RB_MREQ   in   rb_mreq_type
RB_SRES   out   rb_sres_type
ALM   out   slv8
OT   out   slbit
TEMP   out   slv12
VPWRN   in   slv4 := ( others = > ' 0 ' )
VPWRP   in   slv4 := ( others = > ' 0 ' )

Detailed Description

Definition at line 46 of file sysmonx_rbus_arty.vhd.

Member Data Documentation

◆ INIT_OT_LIMIT

INIT_OT_LIMIT real := 125 . 0
Generic

Definition at line 48 of file sysmonx_rbus_arty.vhd.

◆ INIT_OT_RESET

INIT_OT_RESET real := 70 . 0
Generic

Definition at line 49 of file sysmonx_rbus_arty.vhd.

◆ INIT_TEMP_UP

INIT_TEMP_UP real := 85 . 0
Generic

Definition at line 50 of file sysmonx_rbus_arty.vhd.

◆ INIT_TEMP_LOW

INIT_TEMP_LOW real := 60 . 0
Generic

Definition at line 51 of file sysmonx_rbus_arty.vhd.

◆ INIT_VCCINT_UP

INIT_VCCINT_UP real := 0 . 98
Generic

Definition at line 52 of file sysmonx_rbus_arty.vhd.

◆ INIT_VCCINT_LOW

INIT_VCCINT_LOW real := 0 . 92
Generic

Definition at line 53 of file sysmonx_rbus_arty.vhd.

◆ INIT_VCCAUX_UP

INIT_VCCAUX_UP real := 1 . 89
Generic

Definition at line 54 of file sysmonx_rbus_arty.vhd.

◆ INIT_VCCAUX_LOW

INIT_VCCAUX_LOW real := 1 . 71
Generic

Definition at line 55 of file sysmonx_rbus_arty.vhd.

◆ INIT_VCCBRAM_UP

INIT_VCCBRAM_UP real := 0 . 98
Generic

Definition at line 56 of file sysmonx_rbus_arty.vhd.

◆ INIT_VCCBRAM_LOW

INIT_VCCBRAM_LOW real := 0 . 92
Generic

Definition at line 57 of file sysmonx_rbus_arty.vhd.

◆ CLK_MHZ

CLK_MHZ integer := 250
Generic

Definition at line 58 of file sysmonx_rbus_arty.vhd.

◆ RB_ADDR

RB_ADDR slv16 := x " fb00 "
Generic

Definition at line 59 of file sysmonx_rbus_arty.vhd.

◆ CLK

CLK in slbit
Port

Definition at line 61 of file sysmonx_rbus_arty.vhd.

◆ RESET

RESET in slbit := ' 0 '
Port

Definition at line 62 of file sysmonx_rbus_arty.vhd.

◆ RB_MREQ

RB_MREQ in rb_mreq_type
Port

Definition at line 63 of file sysmonx_rbus_arty.vhd.

◆ RB_SRES

RB_SRES out rb_sres_type
Port

Definition at line 64 of file sysmonx_rbus_arty.vhd.

◆ ALM

ALM out slv8
Port

Definition at line 65 of file sysmonx_rbus_arty.vhd.

◆ OT

OT out slbit
Port

Definition at line 66 of file sysmonx_rbus_arty.vhd.

◆ TEMP

TEMP out slv12
Port

Definition at line 67 of file sysmonx_rbus_arty.vhd.

◆ VPWRN

VPWRN in slv4 := ( others = > ' 0 ' )
Port

Definition at line 68 of file sysmonx_rbus_arty.vhd.

◆ VPWRP

VPWRP in slv4 := ( others = > ' 0 ' )
Port

Definition at line 70 of file sysmonx_rbus_arty.vhd.

◆ ieee

ieee
Library

Definition at line 33 of file sysmonx_rbus_arty.vhd.

◆ std_logic_1164

std_logic_1164
use clause

Definition at line 34 of file sysmonx_rbus_arty.vhd.

◆ numeric_std

numeric_std
use clause

Definition at line 35 of file sysmonx_rbus_arty.vhd.

◆ unisim

unisim
Library

Definition at line 37 of file sysmonx_rbus_arty.vhd.

◆ vcomponents

vcomponents
use clause

Definition at line 38 of file sysmonx_rbus_arty.vhd.

◆ slvtypes

slvtypes
use clause

Definition at line 40 of file sysmonx_rbus_arty.vhd.

◆ rblib

rblib
use clause

Definition at line 41 of file sysmonx_rbus_arty.vhd.

◆ sysmonrbuslib

sysmonrbuslib
use clause

Definition at line 42 of file sysmonx_rbus_arty.vhd.


The documentation for this design unit was generated from the following file: