w11 - vhd 0.794
W11 CPU core and support modules
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rbdlib.vhd
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1-- $Id: rbdlib.vhd 1181 2019-07-08 17:00:50Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2010-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Package Name: rbdlib
7-- Description: Definitions for rbus devices
8--
9-- Dependencies: -
10-- Tool versions: xst 12.1-14.7; viv 2014.4-2015.4; ghdl 0.29-0.33
11--
12-- Revision History:
13-- Date Rev Version Comment
14-- 2016-04-02 758 4.1 add rbd_usracc
15-- 2014-09-13 593 4.0 use new rlink v4 iface and 4 bit STAT
16-- 2014-08-15 583 3.5 rb_mreq addr now 16 bit
17-- 2011-11-19 427 1.2.1 now numeric_std clean
18-- 2010-12-29 351 1.2 new address layout; add rbd_timer
19-- 2010-12-27 349 1.1 now correct defs for _rbmon and _eyemon
20-- 2010-12-04 343 1.0 Initial version
21------------------------------------------------------------------------------
22--
23-- two devices have standard addresses
24-- rbd_rbmon x"ffe8"
25-- rbd_tester x"ffe0"
26--
27
28
29library ieee;
30use ieee.std_logic_1164.all;
31use ieee.numeric_std.all;
32
33use work.slvtypes.all;
34use work.rblib.all;
35
36package rbdlib is
37
38constant rbaddr_usracc : slv16 := x"fffa"; -- fffa/8: 1111 1111 1111 1010
39constant rbaddr_rbmon : slv16 := x"ffe8"; -- ffe8/8: 1111 1111 1110 1xxx
40constant rbaddr_tester : slv16 := x"ffe0"; -- ffe0/8: 1111 1111 1110 0xxx
41
42component rbd_tester is -- rbus dev: rbus tester
43 -- complete rbus_aif interface
44 generic (
45 RB_ADDR : slv16 := rbaddr_tester);
46 port (
47 CLK : in slbit; -- clock
48 RESET : in slbit; -- reset
49 RB_MREQ : in rb_mreq_type; -- rbus: request
50 RB_SRES : out rb_sres_type; -- rbus: response
51 RB_LAM : out slv16; -- rbus: look at me
52 RB_STAT : out slv4 -- rbus: status flags
53 );
54end component;
55
56component rbd_rbmon is -- rbus dev: rbus monitor
57 generic (
58 RB_ADDR : slv16 := rbaddr_rbmon;
59 AWIDTH : natural := 9);
60 port (
61 CLK : in slbit; -- clock
62 RESET : in slbit; -- reset
63 RB_MREQ : in rb_mreq_type; -- rbus: request
64 RB_SRES : out rb_sres_type; -- rbus: response
65 RB_SRES_SUM : in rb_sres_type -- rbus: response (sum for monitor)
66 );
67end component;
68
69component rbd_eyemon is -- rbus dev: eye monitor for serport's
70 generic (
71 RB_ADDR : slv16 := (others=>'0');
72 RDIV : slv8 := (others=>'0'));
73 port (
74 CLK : in slbit; -- clock
75 RESET : in slbit; -- reset
76 RB_MREQ : in rb_mreq_type; -- rbus: request
77 RB_SRES : out rb_sres_type; -- rbus: response
78 RXSD : in slbit; -- rx: serial data
79 RXACT : in slbit -- rx: active (start seen)
80 );
81end component;
82
83component rbd_bram is -- rbus dev: bram test target
84 -- incomplete rbus_aif interface
85 generic (
86 RB_ADDR : slv16 := (others=>'0'));
87 port (
88 CLK : in slbit; -- clock
89 RESET : in slbit; -- reset
90 RB_MREQ : in rb_mreq_type; -- rbus: request
91 RB_SRES : out rb_sres_type -- rbus: response
92 );
93end component;
94
95component rbd_timer is -- rbus dev: usec precision timer
96 generic (
97 RB_ADDR : slv16 := (others=>'0'));
98 port (
99 CLK : in slbit; -- clock
100 CE_USEC : in slbit; -- usec pulse
101 RESET : in slbit; -- reset
102 RB_MREQ : in rb_mreq_type; -- rbus: request
103 RB_SRES : out rb_sres_type; -- rbus: response
104 DONE : out slbit; -- mark last timer cycle
105 BUSY : out slbit -- timer running
106 );
107end component;
108
109component rbd_usracc is -- rbus dev: return usr_access register
110 generic (
111 RB_ADDR : slv16 := rbaddr_usracc);
112 port (
113 CLK : in slbit; -- clock
114 RB_MREQ : in rb_mreq_type; -- rbus: request
115 RB_SRES : out rb_sres_type -- rbus: response
116 );
117end component;
118
119end package rbdlib;
in RESET slbit
Definition: rbd_bram.vhd:53
in CLK slbit
Definition: rbd_bram.vhd:52
in RB_MREQ rb_mreq_type
Definition: rbd_bram.vhd:54
RB_ADDR slv16 :=( others => '0')
Definition: rbd_bram.vhd:50
out RB_SRES rb_sres_type
Definition: rbd_bram.vhd:56
in RESET slbit
Definition: rbd_eyemon.vhd:66
in RXSD slbit
Definition: rbd_eyemon.vhd:69
in CLK slbit
Definition: rbd_eyemon.vhd:65
in RXACT slbit
Definition: rbd_eyemon.vhd:71
in RB_MREQ rb_mreq_type
Definition: rbd_eyemon.vhd:67
RB_ADDR slv16 :=( others => '0')
Definition: rbd_eyemon.vhd:62
RDIV slv8 :=( others => '0')
Definition: rbd_eyemon.vhd:63
out RB_SRES rb_sres_type
Definition: rbd_eyemon.vhd:68
in RESET slbit
Definition: rbd_rbmon.vhd:98
RB_ADDR slv16 := rbaddr_rbmon
Definition: rbd_rbmon.vhd:94
AWIDTH natural := 9
Definition: rbd_rbmon.vhd:95
in CLK slbit
Definition: rbd_rbmon.vhd:97
in RB_MREQ rb_mreq_type
Definition: rbd_rbmon.vhd:99
out RB_SRES rb_sres_type
Definition: rbd_rbmon.vhd:100
in RB_SRES_SUM rb_sres_type
Definition: rbd_rbmon.vhd:102
in RESET slbit
Definition: rbd_tester.vhd:66
RB_ADDR slv16 := rbaddr_tester
Definition: rbd_tester.vhd:63
out RB_STAT slv4
Definition: rbd_tester.vhd:71
out RB_LAM slv16
Definition: rbd_tester.vhd:69
in CLK slbit
Definition: rbd_tester.vhd:65
in RB_MREQ rb_mreq_type
Definition: rbd_tester.vhd:67
out RB_SRES rb_sres_type
Definition: rbd_tester.vhd:68
in RESET slbit
Definition: rbd_timer.vhd:47
in CE_USEC slbit
Definition: rbd_timer.vhd:46
out BUSY slbit
Definition: rbd_timer.vhd:52
out DONE slbit
Definition: rbd_timer.vhd:50
in CLK slbit
Definition: rbd_timer.vhd:45
in RB_MREQ rb_mreq_type
Definition: rbd_timer.vhd:48
RB_ADDR slv16 :=( others => '0')
Definition: rbd_timer.vhd:43
out RB_SRES rb_sres_type
Definition: rbd_timer.vhd:49
in CLK slbit
Definition: rbd_usracc.vhd:40
RB_ADDR slv16 := rbaddr_usracc
Definition: rbd_usracc.vhd:38
in RB_MREQ rb_mreq_type
Definition: rbd_usracc.vhd:41
out RB_SRES rb_sres_type
Definition: rbd_usracc.vhd:43
slv16 := x"ffe8" rbaddr_rbmon
Definition: rbdlib.vhd:39
slv16 := x"ffe0" rbaddr_tester
Definition: rbdlib.vhd:40
slv16 := x"fffa" rbaddr_usracc
Definition: rbdlib.vhd:38
Definition: rblib.vhd:32
std_logic_vector( 3 downto 0) slv4
Definition: slvtypes.vhd:36
std_logic_vector( 15 downto 0) slv16
Definition: slvtypes.vhd:48
std_logic slbit
Definition: slvtypes.vhd:30
std_logic_vector( 7 downto 0) slv8
Definition: slvtypes.vhd:40