w11 - vhd 0.794
W11 CPU core and support modules
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syn Architecture Reference
Architecture >> syn

Constants

vpwrmap_0  integer := 1
vpwrmap_1  integer := 2
vpwrmap_2  integer := 9
vpwrmap_3  integer := 10
conf2_cd  integer := ( CLK_MHZ + 25 ) / 26
init_42  bv16 := to_bitvector ( slv ( to_unsigned ( 256 * conf2_cd , 16 ) ) )
init_49  bv16 := ( vpwrmap_0 = > ' 1 ' , vpwrmap_1 = > ' 1 ' , vpwrmap_2 = > ' 1 ' , vpwrmap_3 = > ' 1 ' , others = > ' 0 ' )

Signals

VAUXN  slv16 := ( others = > ' 0 ' )
VAUXP  slv16 := ( others = > ' 0 ' )
SM_DEN  slbit := ' 0 '
SM_DWE  slbit := ' 0 '
SM_DADDR  slv7 := ( others = > ' 0 ' )
SM_DI  slv16 := ( others = > ' 0 ' )
SM_DO  slv16 := ( others = > ' 0 ' )
SM_DRDY  slbit := ' 0 '
SM_EOS  slbit := ' 0 '
SM_EOC  slbit := ' 0 '
SM_RESET  slbit := ' 0 '
SM_CHAN  slv5 := ( others = > ' 0 ' )
SM_ALM  slv8 := ( others = > ' 0 ' )
SM_OT  slbit := ' 0 '
SM_JTAGLOCKED  slbit := ' 0 '
SM_JTAGMODIFIED  slbit := ' 0 '
SM_JTAGBUSY  slbit := ' 0 '

Instantiations

sm  xadc
smrb  sysmon_rbus_core <Entity sysmon_rbus_core>

Detailed Description

Definition at line 73 of file sysmonx_rbus_arty.vhd.

Member Data Documentation

◆ vpwrmap_0

vpwrmap_0 integer := 1
Constant

Definition at line 75 of file sysmonx_rbus_arty.vhd.

◆ vpwrmap_1

vpwrmap_1 integer := 2
Constant

Definition at line 76 of file sysmonx_rbus_arty.vhd.

◆ vpwrmap_2

vpwrmap_2 integer := 9
Constant

Definition at line 77 of file sysmonx_rbus_arty.vhd.

◆ vpwrmap_3

vpwrmap_3 integer := 10
Constant

Definition at line 78 of file sysmonx_rbus_arty.vhd.

◆ conf2_cd

conf2_cd integer := ( CLK_MHZ + 25 ) / 26
Constant

Definition at line 80 of file sysmonx_rbus_arty.vhd.

◆ init_42

init_42 bv16 := to_bitvector ( slv ( to_unsigned ( 256 * conf2_cd , 16 ) ) )
Constant

Definition at line 81 of file sysmonx_rbus_arty.vhd.

◆ init_49

init_49 bv16 := ( vpwrmap_0 = > ' 1 ' , vpwrmap_1 = > ' 1 ' , vpwrmap_2 = > ' 1 ' , vpwrmap_3 = > ' 1 ' , others = > ' 0 ' )
Constant

Definition at line 83 of file sysmonx_rbus_arty.vhd.

◆ VAUXN

VAUXN slv16 := ( others = > ' 0 ' )
Signal

Definition at line 89 of file sysmonx_rbus_arty.vhd.

◆ VAUXP

VAUXP slv16 := ( others = > ' 0 ' )
Signal

Definition at line 90 of file sysmonx_rbus_arty.vhd.

◆ SM_DEN

SM_DEN slbit := ' 0 '
Signal

Definition at line 92 of file sysmonx_rbus_arty.vhd.

◆ SM_DWE

SM_DWE slbit := ' 0 '
Signal

Definition at line 93 of file sysmonx_rbus_arty.vhd.

◆ SM_DADDR

SM_DADDR slv7 := ( others = > ' 0 ' )
Signal

Definition at line 94 of file sysmonx_rbus_arty.vhd.

◆ SM_DI

SM_DI slv16 := ( others = > ' 0 ' )
Signal

Definition at line 95 of file sysmonx_rbus_arty.vhd.

◆ SM_DO

SM_DO slv16 := ( others = > ' 0 ' )
Signal

Definition at line 96 of file sysmonx_rbus_arty.vhd.

◆ SM_DRDY

SM_DRDY slbit := ' 0 '
Signal

Definition at line 97 of file sysmonx_rbus_arty.vhd.

◆ SM_EOS

SM_EOS slbit := ' 0 '
Signal

Definition at line 98 of file sysmonx_rbus_arty.vhd.

◆ SM_EOC

SM_EOC slbit := ' 0 '
Signal

Definition at line 99 of file sysmonx_rbus_arty.vhd.

◆ SM_RESET

SM_RESET slbit := ' 0 '
Signal

Definition at line 100 of file sysmonx_rbus_arty.vhd.

◆ SM_CHAN

SM_CHAN slv5 := ( others = > ' 0 ' )
Signal

Definition at line 101 of file sysmonx_rbus_arty.vhd.

◆ SM_ALM

SM_ALM slv8 := ( others = > ' 0 ' )
Signal

Definition at line 102 of file sysmonx_rbus_arty.vhd.

◆ SM_OT

SM_OT slbit := ' 0 '
Signal

Definition at line 103 of file sysmonx_rbus_arty.vhd.

◆ SM_JTAGLOCKED

SM_JTAGLOCKED slbit := ' 0 '
Signal

Definition at line 104 of file sysmonx_rbus_arty.vhd.

◆ SM_JTAGMODIFIED

SM_JTAGMODIFIED slbit := ' 0 '
Signal

Definition at line 105 of file sysmonx_rbus_arty.vhd.

◆ SM_JTAGBUSY

SM_JTAGBUSY slbit := ' 0 '
Signal

Definition at line 106 of file sysmonx_rbus_arty.vhd.

◆ sm

sm xadc
Instantiation

Definition at line 173 of file sysmonx_rbus_arty.vhd.

◆ smrb

smrb sysmon_rbus_core
Instantiation

Definition at line 212 of file sysmonx_rbus_arty.vhd.


The documentation for this design unit was generated from the following file: