w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Instantiations | Processes | Signals
syn Architecture Reference
Architecture >> syn

Processes

proc_dim  ( CLKMIG )

Constants

rbaddr_rbmon  slv16 := x " ffe8 "
rbaddr_sysmon  slv16 := x " fb00 "
sysid_proj  slv16 := x " 0105 "
sysid_board  slv8 := x " 07 "
sysid_vers  slv8 := x " 00 "

Signals

CLK100_BUF  slbit := ' 0 '
XX_CLK  slbit := ' 0 '
XX_CE_USEC  slbit := ' 0 '
XX_CE_MSEC  slbit := ' 0 '
CLK  slbit := ' 0 '
CE_USEC  slbit := ' 0 '
CE_MSEC  slbit := ' 0 '
CLKS  slbit := ' 0 '
CES_MSEC  slbit := ' 0 '
CLKMIG  slbit := ' 0 '
CLKREF  slbit := ' 0 '
LOCKED  slbit := ' 0 '
LOCKED_CLKMIG  slbit := ' 0 '
MEM_RESET  slbit := ' 0 '
MEM_RESET_RRI  slbit := ' 0 '
RXD  slbit := ' 1 '
TXD  slbit := ' 0 '
SWI  slv16 := ( others = > ' 0 ' )
BTN  slv5 := ( others = > ' 0 ' )
LED  slv16 := ( others = > ' 0 ' )
DSP_DAT  slv32 := ( others = > ' 0 ' )
DSP_DP  slv8 := ( others = > ' 0 ' )
RB_MREQ  rb_mreq_type := rb_mreq_init
RB_SRES  rb_sres_type := rb_sres_init
RB_LAM  slv16 := ( others = > ' 0 ' )
RB_STAT  slv4 := ( others = > ' 0 ' )
SER_MONI  serport_moni_type := serport_moni_init
RB_SRES_TST  rb_sres_type := rb_sres_init
RB_SRES_SYSMON  rb_sres_type := rb_sres_init
RB_SRES_USRACC  rb_sres_type := rb_sres_init
RB_LAM_TST  slbit := ' 0 '
APP_ADDR  slv ( mig_mawidth- 1 downto 0 ) := ( others = > ' 0 ' )
APP_CMD  slv3 := ( others = > ' 0 ' )
APP_EN  slbit := ' 0 '
APP_WDF_DATA  slv ( mig_dwidth- 1 downto 0 ) := ( others = > ' 0 ' )
APP_WDF_END  slbit := ' 0 '
APP_WDF_MASK  slv ( mig_mwidth- 1 downto 0 ) := ( others = > ' 0 ' )
APP_WDF_WREN  slbit := ' 0 '
APP_RD_DATA  slv ( mig_dwidth- 1 downto 0 ) := ( others = > ' 0 ' )
APP_RD_DATA_END  slbit := ' 0 '
APP_RD_DATA_VALID  slbit := ' 0 '
APP_RDY  slbit := ' 0 '
APP_WDF_RDY  slbit := ' 0 '
APP_SR_REQ  slbit := ' 0 '
APP_REF_REQ  slbit := ' 0 '
APP_ZQ_REQ  slbit := ' 0 '
APP_SR_ACTIVE  slbit := ' 0 '
APP_REF_ACK  slbit := ' 0 '
APP_ZQ_ACK  slbit := ' 0 '
MIG_UI_CLK  slbit := ' 0 '
MIG_UI_CLK_SYNC_RST  slbit := ' 0 '
MIG_INIT_CALIB_COMPLETE  slbit := ' 0 '
MIG_SYS_RST  slbit := ' 0 '
XADC_TEMP  slv12 := ( others = > ' 0 ' )
R_DIMCNT  slv2 := ( others = > ' 0 ' )
R_DIMFLG  slbit := ' 0 '

Instantiations

clk100_bufg  bufg_unisim <Entity bufg_unisim>
gen_clkall  s7_cmt_1ce1ce2c <Entity s7_cmt_1ce1ce2c>
cdc_ceusec  cdc_pulse <Entity cdc_pulse>
cdc_cemsec  cdc_pulse <Entity cdc_pulse>
cdc_clkmig_locked  cdc_signal_s1_as <Entity cdc_signal_s1_as>
iob_rs232  bp_rs232_2line_iob <Entity bp_rs232_2line_iob>
rlink  rlink_sp2c <Entity rlink_sp2c>
tst  tst_mig <Entity tst_mig>
mig_ctl  migui_arty <Entity migui_arty>
smrb  sysmonx_rbus_arty <Entity sysmonx_rbus_arty>
uarb  rbd_usracc <Entity rbd_usracc>
rb_sres_or  rb_sres_or_3 <Entity rb_sres_or_3>

Detailed Description

Definition at line 91 of file sys_tst_mig_arty.vhd.

Member Function/Procedure/Process Documentation

◆ proc_dim()

proc_dim (   CLKMIG)

Definition at line 411 of file sys_tst_mig_arty.vhd.

Member Data Documentation

◆ CLK100_BUF

CLK100_BUF slbit := ' 0 '
Signal

Definition at line 93 of file sys_tst_mig_arty.vhd.

◆ XX_CLK

XX_CLK slbit := ' 0 '
Signal

Definition at line 95 of file sys_tst_mig_arty.vhd.

◆ XX_CE_USEC

XX_CE_USEC slbit := ' 0 '
Signal

Definition at line 96 of file sys_tst_mig_arty.vhd.

◆ XX_CE_MSEC

XX_CE_MSEC slbit := ' 0 '
Signal

Definition at line 97 of file sys_tst_mig_arty.vhd.

◆ CLK

CLK slbit := ' 0 '
Signal

Definition at line 99 of file sys_tst_mig_arty.vhd.

◆ CE_USEC

CE_USEC slbit := ' 0 '
Signal

Definition at line 100 of file sys_tst_mig_arty.vhd.

◆ CE_MSEC

CE_MSEC slbit := ' 0 '
Signal

Definition at line 101 of file sys_tst_mig_arty.vhd.

◆ CLKS

CLKS slbit := ' 0 '
Signal

Definition at line 103 of file sys_tst_mig_arty.vhd.

◆ CES_MSEC

CES_MSEC slbit := ' 0 '
Signal

Definition at line 104 of file sys_tst_mig_arty.vhd.

◆ CLKMIG

CLKMIG slbit := ' 0 '
Signal

Definition at line 106 of file sys_tst_mig_arty.vhd.

◆ CLKREF

CLKREF slbit := ' 0 '
Signal

Definition at line 107 of file sys_tst_mig_arty.vhd.

◆ LOCKED

LOCKED slbit := ' 0 '
Signal

Definition at line 109 of file sys_tst_mig_arty.vhd.

◆ LOCKED_CLKMIG

LOCKED_CLKMIG slbit := ' 0 '
Signal

Definition at line 110 of file sys_tst_mig_arty.vhd.

◆ MEM_RESET

MEM_RESET slbit := ' 0 '
Signal

Definition at line 112 of file sys_tst_mig_arty.vhd.

◆ MEM_RESET_RRI

MEM_RESET_RRI slbit := ' 0 '
Signal

Definition at line 113 of file sys_tst_mig_arty.vhd.

◆ RXD

RXD slbit := ' 1 '
Signal

Definition at line 115 of file sys_tst_mig_arty.vhd.

◆ TXD

TXD slbit := ' 0 '
Signal

Definition at line 116 of file sys_tst_mig_arty.vhd.

◆ SWI

SWI slv16 := ( others = > ' 0 ' )
Signal

Definition at line 118 of file sys_tst_mig_arty.vhd.

◆ BTN

BTN slv5 := ( others = > ' 0 ' )
Signal

Definition at line 119 of file sys_tst_mig_arty.vhd.

◆ LED

LED slv16 := ( others = > ' 0 ' )
Signal

Definition at line 120 of file sys_tst_mig_arty.vhd.

◆ DSP_DAT

DSP_DAT slv32 := ( others = > ' 0 ' )
Signal

Definition at line 121 of file sys_tst_mig_arty.vhd.

◆ DSP_DP

DSP_DP slv8 := ( others = > ' 0 ' )
Signal

Definition at line 122 of file sys_tst_mig_arty.vhd.

◆ RB_MREQ

RB_MREQ rb_mreq_type := rb_mreq_init
Signal

Definition at line 124 of file sys_tst_mig_arty.vhd.

◆ RB_SRES

RB_SRES rb_sres_type := rb_sres_init
Signal

Definition at line 125 of file sys_tst_mig_arty.vhd.

◆ RB_LAM

RB_LAM slv16 := ( others = > ' 0 ' )
Signal

Definition at line 126 of file sys_tst_mig_arty.vhd.

◆ RB_STAT

RB_STAT slv4 := ( others = > ' 0 ' )
Signal

Definition at line 127 of file sys_tst_mig_arty.vhd.

◆ SER_MONI

SER_MONI serport_moni_type := serport_moni_init
Signal

Definition at line 129 of file sys_tst_mig_arty.vhd.

◆ RB_SRES_TST

RB_SRES_TST rb_sres_type := rb_sres_init
Signal

Definition at line 131 of file sys_tst_mig_arty.vhd.

◆ RB_SRES_SYSMON

RB_SRES_SYSMON rb_sres_type := rb_sres_init
Signal

Definition at line 132 of file sys_tst_mig_arty.vhd.

◆ RB_SRES_USRACC

RB_SRES_USRACC rb_sres_type := rb_sres_init
Signal

Definition at line 133 of file sys_tst_mig_arty.vhd.

◆ RB_LAM_TST

RB_LAM_TST slbit := ' 0 '
Signal

Definition at line 135 of file sys_tst_mig_arty.vhd.

◆ APP_ADDR

APP_ADDR slv ( mig_mawidth- 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 137 of file sys_tst_mig_arty.vhd.

◆ APP_CMD

APP_CMD slv3 := ( others = > ' 0 ' )
Signal

Definition at line 138 of file sys_tst_mig_arty.vhd.

◆ APP_EN

APP_EN slbit := ' 0 '
Signal

Definition at line 139 of file sys_tst_mig_arty.vhd.

◆ APP_WDF_DATA

APP_WDF_DATA slv ( mig_dwidth- 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 140 of file sys_tst_mig_arty.vhd.

◆ APP_WDF_END

APP_WDF_END slbit := ' 0 '
Signal

Definition at line 141 of file sys_tst_mig_arty.vhd.

◆ APP_WDF_MASK

APP_WDF_MASK slv ( mig_mwidth- 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 142 of file sys_tst_mig_arty.vhd.

◆ APP_WDF_WREN

APP_WDF_WREN slbit := ' 0 '
Signal

Definition at line 143 of file sys_tst_mig_arty.vhd.

◆ APP_RD_DATA

APP_RD_DATA slv ( mig_dwidth- 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 144 of file sys_tst_mig_arty.vhd.

◆ APP_RD_DATA_END

APP_RD_DATA_END slbit := ' 0 '
Signal

Definition at line 145 of file sys_tst_mig_arty.vhd.

◆ APP_RD_DATA_VALID

APP_RD_DATA_VALID slbit := ' 0 '
Signal

Definition at line 146 of file sys_tst_mig_arty.vhd.

◆ APP_RDY

APP_RDY slbit := ' 0 '
Signal

Definition at line 147 of file sys_tst_mig_arty.vhd.

◆ APP_WDF_RDY

APP_WDF_RDY slbit := ' 0 '
Signal

Definition at line 148 of file sys_tst_mig_arty.vhd.

◆ APP_SR_REQ

APP_SR_REQ slbit := ' 0 '
Signal

Definition at line 149 of file sys_tst_mig_arty.vhd.

◆ APP_REF_REQ

APP_REF_REQ slbit := ' 0 '
Signal

Definition at line 150 of file sys_tst_mig_arty.vhd.

◆ APP_ZQ_REQ

APP_ZQ_REQ slbit := ' 0 '
Signal

Definition at line 151 of file sys_tst_mig_arty.vhd.

◆ APP_SR_ACTIVE

APP_SR_ACTIVE slbit := ' 0 '
Signal

Definition at line 152 of file sys_tst_mig_arty.vhd.

◆ APP_REF_ACK

APP_REF_ACK slbit := ' 0 '
Signal

Definition at line 153 of file sys_tst_mig_arty.vhd.

◆ APP_ZQ_ACK

APP_ZQ_ACK slbit := ' 0 '
Signal

Definition at line 154 of file sys_tst_mig_arty.vhd.

◆ MIG_UI_CLK

MIG_UI_CLK slbit := ' 0 '
Signal

Definition at line 155 of file sys_tst_mig_arty.vhd.

◆ MIG_UI_CLK_SYNC_RST

MIG_UI_CLK_SYNC_RST slbit := ' 0 '
Signal

Definition at line 156 of file sys_tst_mig_arty.vhd.

◆ MIG_INIT_CALIB_COMPLETE

MIG_INIT_CALIB_COMPLETE slbit := ' 0 '
Signal

Definition at line 157 of file sys_tst_mig_arty.vhd.

◆ MIG_SYS_RST

MIG_SYS_RST slbit := ' 0 '
Signal

Definition at line 158 of file sys_tst_mig_arty.vhd.

◆ XADC_TEMP

XADC_TEMP slv12 := ( others = > ' 0 ' )
Signal

Definition at line 160 of file sys_tst_mig_arty.vhd.

◆ R_DIMCNT

R_DIMCNT slv2 := ( others = > ' 0 ' )
Signal

Definition at line 162 of file sys_tst_mig_arty.vhd.

◆ R_DIMFLG

R_DIMFLG slbit := ' 0 '
Signal

Definition at line 163 of file sys_tst_mig_arty.vhd.

◆ rbaddr_rbmon

rbaddr_rbmon slv16 := x " ffe8 "
Constant

Definition at line 165 of file sys_tst_mig_arty.vhd.

◆ rbaddr_sysmon

rbaddr_sysmon slv16 := x " fb00 "
Constant

Definition at line 166 of file sys_tst_mig_arty.vhd.

◆ sysid_proj

sysid_proj slv16 := x " 0105 "
Constant

Definition at line 168 of file sys_tst_mig_arty.vhd.

◆ sysid_board

sysid_board slv8 := x " 07 "
Constant

Definition at line 169 of file sys_tst_mig_arty.vhd.

◆ sysid_vers

sysid_vers slv8 := x " 00 "
Constant

Definition at line 170 of file sys_tst_mig_arty.vhd.

◆ clk100_bufg

clk100_bufg bufg_unisim
Instantiation

Definition at line 178 of file sys_tst_mig_arty.vhd.

◆ gen_clkall

gen_clkall s7_cmt_1ce1ce2c
Instantiation

Definition at line 215 of file sys_tst_mig_arty.vhd.

◆ cdc_ceusec

cdc_ceusec cdc_pulse
Instantiation

Definition at line 232 of file sys_tst_mig_arty.vhd.

◆ cdc_cemsec

cdc_cemsec cdc_pulse
Instantiation

Definition at line 245 of file sys_tst_mig_arty.vhd.

◆ cdc_clkmig_locked

cdc_clkmig_locked cdc_signal_s1_as
Instantiation

Definition at line 252 of file sys_tst_mig_arty.vhd.

◆ iob_rs232

iob_rs232 bp_rs232_2line_iob
Instantiation

Definition at line 261 of file sys_tst_mig_arty.vhd.

◆ rlink

rlink rlink_sp2c
Instantiation

Definition at line 296 of file sys_tst_mig_arty.vhd.

◆ tst

tst tst_mig
Instantiation

Definition at line 332 of file sys_tst_mig_arty.vhd.

◆ mig_ctl

mig_ctl migui_arty
Instantiation

Definition at line 376 of file sys_tst_mig_arty.vhd.

◆ smrb

smrb sysmonx_rbus_arty
Instantiation

Definition at line 394 of file sys_tst_mig_arty.vhd.

◆ uarb

uarb rbd_usracc
Instantiation

Definition at line 401 of file sys_tst_mig_arty.vhd.

◆ rb_sres_or

rb_sres_or rb_sres_or_3
Instantiation

Definition at line 409 of file sys_tst_mig_arty.vhd.

The documentation for this design unit was generated from the following file: