bufg_unisim Entity Reference

Inheritance diagram for bufg_unisim:

Entities
syn	architecture

Libraries
ieee
unisim

Use Clauses
std_logic_1164
vcomponents

Ports
O	out	std_ulogic
I	in	std_ulogic

Detailed Description

Definition at line 25 of file bufg_unisim.vhd.

Member Data Documentation

O

O out std_ulogic

Port

Definition at line 27 of file bufg_unisim.vhd.

I

I in std_ulogic

Port

Definition at line 29 of file bufg_unisim.vhd.

ieee

ieee

Library

Definition at line 19 of file bufg_unisim.vhd.

std_logic_1164

std_logic_1164

use clause

Definition at line 20 of file bufg_unisim.vhd.

unisim

unisim

Library

Definition at line 22 of file bufg_unisim.vhd.

vcomponents

vcomponents

use clause

Definition at line 23 of file bufg_unisim.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/xlib/bufg_unisim.vhd