30use ieee.std_logic_1164.
all;
std_logic_vector( 3 downto 0) slv4
std_logic_vector( 15 downto 0) slv16
std_logic_vector( 5 downto 0) slv6
std_logic_vector( 7 downto 0) slv8
slv16 :=( others => '0') DSP_DAT
slv8 :=( others => '0') LED
slv8 :=( others => '0') SWI
slv4 :=( others => '0') DSP_DP
slv4 :=( others => '0') BTN
in BTN slv( BWIDTH- 1 downto 0)