w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Instantiations | Processes | Signals
syn Architecture Reference
Architecture >> syn

Processes

proc_dim  ( CLKMIG )

Constants

rbaddr_rbmon  slv16 := x " ffe8 "
rbaddr_sysmon  slv16 := x " fb00 "
sysid_proj  slv16 := x " 0104 "
sysid_board  slv8 := x " 07 "
sysid_vers  slv8 := x " 00 "

Signals

CLK100_BUF  slbit := ' 0 '
CLK  slbit := ' 0 '
CE_USEC  slbit := ' 0 '
CE_MSEC  slbit := ' 0 '
CLKS  slbit := ' 0 '
CES_MSEC  slbit := ' 0 '
CLKMIG  slbit := ' 0 '
CLKREF  slbit := ' 0 '
LOCKED  slbit := ' 0 '
LOCKED_CLK  slbit := ' 0 '
GBL_RESET  slbit := ' 0 '
MEM_RESET  slbit := ' 0 '
MEM_RESET_RRI  slbit := ' 0 '
RXD  slbit := ' 1 '
TXD  slbit := ' 0 '
SWI  slv16 := ( others = > ' 0 ' )
BTN  slv5 := ( others = > ' 0 ' )
LED  slv16 := ( others = > ' 0 ' )
DSP_DAT  slv32 := ( others = > ' 0 ' )
DSP_DP  slv8 := ( others = > ' 0 ' )
RB_MREQ  rb_mreq_type := rb_mreq_init
RB_SRES  rb_sres_type := rb_sres_init
RB_LAM  slv16 := ( others = > ' 0 ' )
RB_STAT  slv4 := ( others = > ' 0 ' )
SER_MONI  serport_moni_type := serport_moni_init
RB_SRES_TST  rb_sres_type := rb_sres_init
RB_SRES_HIO  rb_sres_type := rb_sres_init
RB_SRES_SYSMON  rb_sres_type := rb_sres_init
RB_SRES_USRACC  rb_sres_type := rb_sres_init
RB_LAM_TST  slbit := ' 0 '
MEM_REQ  slbit := ' 0 '
MEM_WE  slbit := ' 0 '
MEM_BUSY  slbit := ' 0 '
MEM_ACK_R  slbit := ' 0 '
MEM_ACK_W  slbit := ' 0 '
MEM_ACT_R  slbit := ' 0 '
MEM_ACT_W  slbit := ' 0 '
MEM_ADDR  slv20 := ( others = > ' 0 ' )
MEM_BE  slv4 := ( others = > ' 0 ' )
MEM_DI  slv32 := ( others = > ' 0 ' )
MEM_DO  slv32 := ( others = > ' 0 ' )
MIG_MONI  sramif2migui_moni_type := sramif2migui_moni_init
XADC_TEMP  slv12 := ( others = > ' 0 ' )
R_DIMCNT  slv2 := ( others = > ' 0 ' )
R_DIMFLG  slbit := ' 0 '

Instantiations

clk100_bufg  bufg_unisim <Entity bufg_unisim>
gen_clkall  s7_cmt_1ce1ce2c <Entity s7_cmt_1ce1ce2c>
cdc_clk_locked  cdc_signal_s1_as <Entity cdc_signal_s1_as>
iob_rs232  bp_rs232_2line_iob <Entity bp_rs232_2line_iob>
rlink  rlink_sp2c <Entity rlink_sp2c>
tst  tst_sram <Entity tst_sram>
memctl  sramif_mig_arty <Entity sramif_mig_arty>
hio  sn_humanio_emu_rbus <Entity sn_humanio_emu_rbus>
smrb  sysmonx_rbus_arty <Entity sysmonx_rbus_arty>
uarb  rbd_usracc <Entity rbd_usracc>
rb_sres_or  rb_sres_or_4 <Entity rb_sres_or_4>

Detailed Description

Definition at line 93 of file sys_tst_sram_arty.vhd.

Member Function/Procedure/Process Documentation

◆ proc_dim()

proc_dim (   CLKMIG)

Definition at line 380 of file sys_tst_sram_arty.vhd.

Member Data Documentation

◆ CLK100_BUF

CLK100_BUF slbit := ' 0 '
Signal

Definition at line 95 of file sys_tst_sram_arty.vhd.

◆ CLK

CLK slbit := ' 0 '
Signal

Definition at line 97 of file sys_tst_sram_arty.vhd.

◆ CE_USEC

CE_USEC slbit := ' 0 '
Signal

Definition at line 99 of file sys_tst_sram_arty.vhd.

◆ CE_MSEC

CE_MSEC slbit := ' 0 '
Signal

Definition at line 100 of file sys_tst_sram_arty.vhd.

◆ CLKS

CLKS slbit := ' 0 '
Signal

Definition at line 102 of file sys_tst_sram_arty.vhd.

◆ CES_MSEC

CES_MSEC slbit := ' 0 '
Signal

Definition at line 103 of file sys_tst_sram_arty.vhd.

◆ CLKMIG

CLKMIG slbit := ' 0 '
Signal

Definition at line 105 of file sys_tst_sram_arty.vhd.

◆ CLKREF

CLKREF slbit := ' 0 '
Signal

Definition at line 106 of file sys_tst_sram_arty.vhd.

◆ LOCKED

LOCKED slbit := ' 0 '
Signal

Definition at line 108 of file sys_tst_sram_arty.vhd.

◆ LOCKED_CLK

LOCKED_CLK slbit := ' 0 '
Signal

Definition at line 109 of file sys_tst_sram_arty.vhd.

◆ GBL_RESET

GBL_RESET slbit := ' 0 '
Signal

Definition at line 111 of file sys_tst_sram_arty.vhd.

◆ MEM_RESET

MEM_RESET slbit := ' 0 '
Signal

Definition at line 112 of file sys_tst_sram_arty.vhd.

◆ MEM_RESET_RRI

MEM_RESET_RRI slbit := ' 0 '
Signal

Definition at line 113 of file sys_tst_sram_arty.vhd.

◆ RXD

RXD slbit := ' 1 '
Signal

Definition at line 115 of file sys_tst_sram_arty.vhd.

◆ TXD

TXD slbit := ' 0 '
Signal

Definition at line 116 of file sys_tst_sram_arty.vhd.

◆ SWI

SWI slv16 := ( others = > ' 0 ' )
Signal

Definition at line 118 of file sys_tst_sram_arty.vhd.

◆ BTN

BTN slv5 := ( others = > ' 0 ' )
Signal

Definition at line 119 of file sys_tst_sram_arty.vhd.

◆ LED

LED slv16 := ( others = > ' 0 ' )
Signal

Definition at line 120 of file sys_tst_sram_arty.vhd.

◆ DSP_DAT

DSP_DAT slv32 := ( others = > ' 0 ' )
Signal

Definition at line 121 of file sys_tst_sram_arty.vhd.

◆ DSP_DP

DSP_DP slv8 := ( others = > ' 0 ' )
Signal

Definition at line 122 of file sys_tst_sram_arty.vhd.

◆ RB_MREQ

RB_MREQ rb_mreq_type := rb_mreq_init
Signal

Definition at line 124 of file sys_tst_sram_arty.vhd.

◆ RB_SRES

RB_SRES rb_sres_type := rb_sres_init
Signal

Definition at line 125 of file sys_tst_sram_arty.vhd.

◆ RB_LAM

RB_LAM slv16 := ( others = > ' 0 ' )
Signal

Definition at line 126 of file sys_tst_sram_arty.vhd.

◆ RB_STAT

RB_STAT slv4 := ( others = > ' 0 ' )
Signal

Definition at line 127 of file sys_tst_sram_arty.vhd.

◆ SER_MONI

SER_MONI serport_moni_type := serport_moni_init
Signal

Definition at line 129 of file sys_tst_sram_arty.vhd.

◆ RB_SRES_TST

RB_SRES_TST rb_sres_type := rb_sres_init
Signal

Definition at line 131 of file sys_tst_sram_arty.vhd.

◆ RB_SRES_HIO

RB_SRES_HIO rb_sres_type := rb_sres_init
Signal

Definition at line 132 of file sys_tst_sram_arty.vhd.

◆ RB_SRES_SYSMON

RB_SRES_SYSMON rb_sres_type := rb_sres_init
Signal

Definition at line 133 of file sys_tst_sram_arty.vhd.

◆ RB_SRES_USRACC

RB_SRES_USRACC rb_sres_type := rb_sres_init
Signal

Definition at line 134 of file sys_tst_sram_arty.vhd.

◆ RB_LAM_TST

RB_LAM_TST slbit := ' 0 '
Signal

Definition at line 136 of file sys_tst_sram_arty.vhd.

◆ MEM_REQ

MEM_REQ slbit := ' 0 '
Signal

Definition at line 138 of file sys_tst_sram_arty.vhd.

◆ MEM_WE

MEM_WE slbit := ' 0 '
Signal

Definition at line 139 of file sys_tst_sram_arty.vhd.

◆ MEM_BUSY

MEM_BUSY slbit := ' 0 '
Signal

Definition at line 140 of file sys_tst_sram_arty.vhd.

◆ MEM_ACK_R

MEM_ACK_R slbit := ' 0 '
Signal

Definition at line 141 of file sys_tst_sram_arty.vhd.

◆ MEM_ACK_W

MEM_ACK_W slbit := ' 0 '
Signal

Definition at line 142 of file sys_tst_sram_arty.vhd.

◆ MEM_ACT_R

MEM_ACT_R slbit := ' 0 '
Signal

Definition at line 143 of file sys_tst_sram_arty.vhd.

◆ MEM_ACT_W

MEM_ACT_W slbit := ' 0 '
Signal

Definition at line 144 of file sys_tst_sram_arty.vhd.

◆ MEM_ADDR

MEM_ADDR slv20 := ( others = > ' 0 ' )
Signal

Definition at line 145 of file sys_tst_sram_arty.vhd.

◆ MEM_BE

MEM_BE slv4 := ( others = > ' 0 ' )
Signal

Definition at line 146 of file sys_tst_sram_arty.vhd.

◆ MEM_DI

MEM_DI slv32 := ( others = > ' 0 ' )
Signal

Definition at line 147 of file sys_tst_sram_arty.vhd.

◆ MEM_DO

MEM_DO slv32 := ( others = > ' 0 ' )
Signal

Definition at line 148 of file sys_tst_sram_arty.vhd.

◆ MIG_MONI

MIG_MONI sramif2migui_moni_type := sramif2migui_moni_init
Signal

Definition at line 150 of file sys_tst_sram_arty.vhd.

◆ XADC_TEMP

XADC_TEMP slv12 := ( others = > ' 0 ' )
Signal

Definition at line 151 of file sys_tst_sram_arty.vhd.

◆ R_DIMCNT

R_DIMCNT slv2 := ( others = > ' 0 ' )
Signal

Definition at line 153 of file sys_tst_sram_arty.vhd.

◆ R_DIMFLG

R_DIMFLG slbit := ' 0 '
Signal

Definition at line 154 of file sys_tst_sram_arty.vhd.

◆ rbaddr_rbmon

rbaddr_rbmon slv16 := x " ffe8 "
Constant

Definition at line 156 of file sys_tst_sram_arty.vhd.

◆ rbaddr_sysmon

rbaddr_sysmon slv16 := x " fb00 "
Constant

Definition at line 157 of file sys_tst_sram_arty.vhd.

◆ sysid_proj

sysid_proj slv16 := x " 0104 "
Constant

Definition at line 159 of file sys_tst_sram_arty.vhd.

◆ sysid_board

sysid_board slv8 := x " 07 "
Constant

Definition at line 160 of file sys_tst_sram_arty.vhd.

◆ sysid_vers

sysid_vers slv8 := x " 00 "
Constant

Definition at line 161 of file sys_tst_sram_arty.vhd.

◆ clk100_bufg

clk100_bufg bufg_unisim
Instantiation

Definition at line 169 of file sys_tst_sram_arty.vhd.

◆ gen_clkall

gen_clkall s7_cmt_1ce1ce2c
Instantiation

Definition at line 206 of file sys_tst_sram_arty.vhd.

◆ cdc_clk_locked

cdc_clk_locked cdc_signal_s1_as
Instantiation

Definition at line 213 of file sys_tst_sram_arty.vhd.

◆ iob_rs232

iob_rs232 bp_rs232_2line_iob
Instantiation

Definition at line 224 of file sys_tst_sram_arty.vhd.

◆ rlink

rlink rlink_sp2c
Instantiation

Definition at line 259 of file sys_tst_sram_arty.vhd.

◆ tst

tst tst_sram
Instantiation

Definition at line 288 of file sys_tst_sram_arty.vhd.

◆ memctl

memctl sramif_mig_arty
Instantiation

Definition at line 328 of file sys_tst_sram_arty.vhd.

◆ hio

hio sn_humanio_emu_rbus
Instantiation

Definition at line 346 of file sys_tst_sram_arty.vhd.

◆ smrb

smrb sysmonx_rbus_arty
Instantiation

Definition at line 362 of file sys_tst_sram_arty.vhd.

◆ uarb

uarb rbd_usracc
Instantiation

Definition at line 369 of file sys_tst_sram_arty.vhd.

◆ rb_sres_or

rb_sres_or rb_sres_or_4
Instantiation

Definition at line 378 of file sys_tst_sram_arty.vhd.

The documentation for this design unit was generated from the following file: