w11 - vhd 0.794
W11 CPU core and support modules
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Attributes | Generics | Libraries | Ports | Use Clauses
rlink_core Entity Reference
Inheritance diagram for rlink_core:
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Collaboration diagram for rlink_core:
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Entities

syn  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
numeric_std 
slvtypes  Package <slvtypes>
memlib  Package <memlib>
comlib  Package <comlib>
rblib  Package <rblib>
rlinklib  Package <rlinklib>

Generics

BTOWIDTH  positive := 5
RTAWIDTH  positive := 12
SYSID  slv32 := ( others = > ' 0 ' )
ENAPIN_RLMON  integer := - 1
ENAPIN_RBMON  integer := - 1

Ports

CLK   in   slbit
CE_INT   in   slbit := ' 0 '
RESET   in   slbit
RL_DI   in   slv9
RL_ENA   in   slbit
RL_BUSY   out   slbit
RL_DO   out   slv9
RL_VAL   out   slbit
RL_HOLD   in   slbit
RL_MONI   out   rl_moni_type
RB_MREQ   out   rb_mreq_type
RB_SRES   in   rb_sres_type
RB_LAM   in   slv16
RB_STAT   in   slv4

Attributes

fsm_encoding  string
fsm_encoding  entity is " one-hot "

Detailed Description

Definition at line 156 of file rlink_core.vhd.

Member Data Documentation

◆ BTOWIDTH

BTOWIDTH positive := 5
Generic

Definition at line 158 of file rlink_core.vhd.

◆ RTAWIDTH

RTAWIDTH positive := 12
Generic

Definition at line 159 of file rlink_core.vhd.

◆ SYSID

SYSID slv32 := ( others = > ' 0 ' )
Generic

Definition at line 160 of file rlink_core.vhd.

◆ ENAPIN_RLMON

ENAPIN_RLMON integer := - 1
Generic

Definition at line 161 of file rlink_core.vhd.

◆ ENAPIN_RBMON

ENAPIN_RBMON integer := - 1
Generic

Definition at line 162 of file rlink_core.vhd.

◆ CLK

CLK in slbit
Port

Definition at line 164 of file rlink_core.vhd.

◆ CE_INT

CE_INT in slbit := ' 0 '
Port

Definition at line 165 of file rlink_core.vhd.

◆ RESET

RESET in slbit
Port

Definition at line 166 of file rlink_core.vhd.

◆ RL_DI

RL_DI in slv9
Port

Definition at line 167 of file rlink_core.vhd.

◆ RL_ENA

RL_ENA in slbit
Port

Definition at line 168 of file rlink_core.vhd.

◆ RL_BUSY

RL_BUSY out slbit
Port

Definition at line 169 of file rlink_core.vhd.

◆ RL_DO

RL_DO out slv9
Port

Definition at line 170 of file rlink_core.vhd.

◆ RL_VAL

RL_VAL out slbit
Port

Definition at line 171 of file rlink_core.vhd.

◆ RL_HOLD

RL_HOLD in slbit
Port

Definition at line 172 of file rlink_core.vhd.

◆ RL_MONI

RL_MONI out rl_moni_type
Port

Definition at line 173 of file rlink_core.vhd.

◆ RB_MREQ

RB_MREQ out rb_mreq_type
Port

Definition at line 174 of file rlink_core.vhd.

◆ RB_SRES

RB_SRES in rb_sres_type
Port

Definition at line 175 of file rlink_core.vhd.

◆ RB_LAM

RB_LAM in slv16
Port

Definition at line 176 of file rlink_core.vhd.

◆ RB_STAT

RB_STAT in slv4
Port

Definition at line 178 of file rlink_core.vhd.

◆ fsm_encoding [1/2]

fsm_encoding string
Attribute

Definition at line 180 of file rlink_core.vhd.

◆ fsm_encoding [2/2]

fsm_encoding entity is " one-hot "
Attribute

Definition at line 181 of file rlink_core.vhd.

◆ ieee

ieee
Library

Definition at line 146 of file rlink_core.vhd.

◆ std_logic_1164

std_logic_1164
use clause

Definition at line 147 of file rlink_core.vhd.

◆ numeric_std

numeric_std
use clause

Definition at line 148 of file rlink_core.vhd.

◆ slvtypes

slvtypes
use clause

Definition at line 150 of file rlink_core.vhd.

◆ memlib

memlib
use clause

Definition at line 151 of file rlink_core.vhd.

◆ comlib

comlib
use clause

Definition at line 152 of file rlink_core.vhd.

◆ rblib

rblib
use clause

Definition at line 153 of file rlink_core.vhd.

◆ rlinklib

rlinklib
use clause

Definition at line 154 of file rlink_core.vhd.

The documentation for this design unit was generated from the following file: