w11 - vhd 0.794
W11 CPU core and support modules
Loading...
Searching...
No Matches
rb_sres_or_mon Entity Reference
Inheritance diagram for rb_sres_or_mon:
[legend]

Entities

sim  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_textio 
textio 
slvtypes  Package <slvtypes>
rblib  Package <rblib>

Ports

RB_SRES_1   in   rb_sres_type
RB_SRES_2   in   rb_sres_type
RB_SRES_3   in   rb_sres_type := rb_sres_init
RB_SRES_4   in   rb_sres_type := rb_sres_init
RB_SRES_5   in   rb_sres_type := rb_sres_init
RB_SRES_6   in   rb_sres_type := rb_sres_init

Detailed Description

Definition at line 31 of file rb_sres_or_mon.vhd.

Member Data Documentation

◆ RB_SRES_1

RB_SRES_1 in rb_sres_type
Port

Definition at line 33 of file rb_sres_or_mon.vhd.

◆ RB_SRES_2

RB_SRES_2 in rb_sres_type
Port

Definition at line 34 of file rb_sres_or_mon.vhd.

◆ RB_SRES_3

RB_SRES_3 in rb_sres_type := rb_sres_init
Port

Definition at line 35 of file rb_sres_or_mon.vhd.

◆ RB_SRES_4

RB_SRES_4 in rb_sres_type := rb_sres_init
Port

Definition at line 36 of file rb_sres_or_mon.vhd.

◆ RB_SRES_5

RB_SRES_5 in rb_sres_type := rb_sres_init
Port

Definition at line 37 of file rb_sres_or_mon.vhd.

◆ RB_SRES_6

RB_SRES_6 in rb_sres_type := rb_sres_init
Port

Definition at line 39 of file rb_sres_or_mon.vhd.

◆ ieee

ieee
Library

Definition at line 21 of file rb_sres_or_mon.vhd.

◆ std_logic_1164

std_logic_1164
use clause

Definition at line 22 of file rb_sres_or_mon.vhd.

◆ std_logic_textio

std_logic_textio
use clause

Definition at line 23 of file rb_sres_or_mon.vhd.

◆ textio

textio
use clause

Definition at line 24 of file rb_sres_or_mon.vhd.

◆ slvtypes

slvtypes
use clause

Definition at line 26 of file rb_sres_or_mon.vhd.

◆ rblib

rblib
use clause

Definition at line 27 of file rb_sres_or_mon.vhd.


The documentation for this design unit was generated from the following file: