sim Architecture Reference

Architecture >> sim

Signals
ENA	slbit := ' 0 '
CLK_CYCLE	integer := 0

Instantiations
clkcnt	simclkcnt <Entity simclkcnt>
rbmon	rb_mon <Entity rb_mon>

Detailed Description

Definition at line 52 of file rb_mon_sb.vhd.

Member Data Documentation

ENA

ENA slbit := ' 0 '

Signal

Definition at line 54 of file rb_mon_sb.vhd.

CLK_CYCLE

CLK_CYCLE integer := 0

Signal

Definition at line 55 of file rb_mon_sb.vhd.

clkcnt

clkcnt simclkcnt

Instantiation

Definition at line 62 of file rb_mon_sb.vhd.

rbmon

rbmon rb_mon

Instantiation

Definition at line 77 of file rb_mon_sb.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/rbus/rb_mon_sb.vhd