syn Architecture Reference

Architecture >> syn

Processes
proc_clki	( CLKI )
proc_clko	( CLKO )

Subtypes
d_range	integer range DWIDTH - 1 downto 0

Signals
R_DI	slv ( d_range ) := ( others = > ' 0 ' )
R_UPDT	slbit := ' 0 '
PULSE_PIN	slbit := ' 0 '
PULSE_BUSY	slbit := ' 0 '
PULSE_POUT	slbit := ' 0 '

Instantiations
cdc_ena	cdc_pulse <Entity cdc_pulse>
cdc_dout	cdc_vector_s0 <Entity cdc_vector_s0>

Detailed Description

Definition at line 40 of file cdc_value.vhd.

Member Function/Procedure/Process Documentation

proc_clki()

proc_clki

(

CLKI

)

Definition at line 78 of file cdc_value.vhd.

proc_clko()

proc_clko (   CLKO   )

Process

Definition at line 87 of file cdc_value.vhd.

Member Data Documentation

d_range

d_range integer range DWIDTH - 1 downto 0

Subtype

Definition at line 42 of file cdc_value.vhd.

R_DI

R_DI slv ( d_range ) := ( others = > ' 0 ' )

Signal

Definition at line 44 of file cdc_value.vhd.

R_UPDT

R_UPDT slbit := ' 0 '

Signal

Definition at line 45 of file cdc_value.vhd.

PULSE_PIN

PULSE_PIN slbit := ' 0 '

Signal

Definition at line 47 of file cdc_value.vhd.

PULSE_BUSY

PULSE_BUSY slbit := ' 0 '

Signal

Definition at line 48 of file cdc_value.vhd.

PULSE_POUT

PULSE_POUT slbit := ' 0 '

Signal

Definition at line 49 of file cdc_value.vhd.

cdc_ena

cdc_ena cdc_pulse

Instantiation

Definition at line 64 of file cdc_value.vhd.

cdc_dout

cdc_dout cdc_vector_s0

Instantiation

Definition at line 74 of file cdc_value.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/cdclib/cdc_value.vhd