cdc_vector_s0 Entity Reference

Inheritance diagram for cdc_vector_s0:

Entities
syn	architecture

Libraries
ieee

Use Clauses
std_logic_1164
slvtypes	Package <slvtypes>

Generics
DWIDTH	positive := 16

Ports
CLKO	in	slbit
ENA	in	slbit := ' 1 '
DI	in	slv ( DWIDTH - 1 downto 0 )
DO	out	slv ( DWIDTH - 1 downto 0 )

Detailed Description

Definition at line 25 of file cdc_vector_s0.vhd.

Member Data Documentation

DWIDTH

DWIDTH positive := 16

Generic

Definition at line 27 of file cdc_vector_s0.vhd.

CLKO

CLKO in slbit

Port

Definition at line 29 of file cdc_vector_s0.vhd.

ENA

ENA in slbit := ' 1 '

Port

Definition at line 30 of file cdc_vector_s0.vhd.

DI

DI in slv ( DWIDTH - 1 downto 0 )

Port

Definition at line 31 of file cdc_vector_s0.vhd.

DO

DO out slv ( DWIDTH - 1 downto 0 )

Port

Definition at line 33 of file cdc_vector_s0.vhd.

ieee

ieee

Library

Definition at line 20 of file cdc_vector_s0.vhd.

std_logic_1164

std_logic_1164

use clause

Definition at line 21 of file cdc_vector_s0.vhd.

slvtypes

slvtypes

use clause

Definition at line 23 of file cdc_vector_s0.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/cdclib/cdc_vector_s0.vhd