w11 - vhd 0.794
W11 CPU core and support modules
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arty_dummy.vhd
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1-- $Id: arty_dummy.vhd 1181 2019-07-08 17:00:50Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2016- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Module Name: arty_dummy - syn
7-- Description: arty minimal target (base; serport loopback)
8--
9-- Dependencies: -
10-- To test: tb_arty
11-- Target Devices: generic
12-- Tool versions: viv 2015.4; ghdl 0.33
13--
14-- Revision History:
15-- Date Rev Version Comment
16-- 2016-03-06 740 1.1 add A_VPWRN/P to baseline config
17-- 2016-01-31 726 1.0 Initial version (cloned from basys3)
18------------------------------------------------------------------------------
19
20library ieee;
21use ieee.std_logic_1164.all;
22
23use work.slvtypes.all;
24
25entity arty_dummy is -- ARTY dummy (base; loopback)
26 -- implements arty_aif
27 port (
28 I_CLK100 : in slbit; -- 100 MHz board clock
29 I_RXD : in slbit; -- receive data (board view)
30 O_TXD : out slbit; -- transmit data (board view)
31 I_SWI : in slv4; -- arty switches
32 I_BTN : in slv4; -- arty buttons
33 O_LED : out slv4; -- arty leds
34 O_RGBLED0 : out slv3; -- arty rgb-led 0
35 O_RGBLED1 : out slv3; -- arty rgb-led 1
36 O_RGBLED2 : out slv3; -- arty rgb-led 2
37 O_RGBLED3 : out slv3; -- arty rgb-led 3
38 A_VPWRN : in slv4; -- arty pwrmon (neg)
39 A_VPWRP : in slv4 -- arty pwrmon (pos)
40 );
41end arty_dummy;
42
43architecture syn of arty_dummy is
44
45begin
46
47 O_TXD <= I_RXD; -- loop back serport
48
49 O_LED <= I_SWI; -- mirror SWI on LED
50
51 O_RGBLED0 <= I_BTN(2 downto 0); -- mirror BTN on RGBLED0
52 O_RGBLED1 <= (others=>'0');
53 O_RGBLED2 <= (others=>'0');
54 O_RGBLED3 <= (others=>'0');
55
56end syn;
in I_SWI slv4
Definition: arty_dummy.vhd:31
out O_TXD slbit
Definition: arty_dummy.vhd:30
in I_RXD slbit
Definition: arty_dummy.vhd:29
in A_VPWRN slv4
Definition: arty_dummy.vhd:38
in A_VPWRP slv4
Definition: arty_dummy.vhd:40
in I_BTN slv4
Definition: arty_dummy.vhd:32
out O_RGBLED3 slv3
Definition: arty_dummy.vhd:37
out O_RGBLED0 slv3
Definition: arty_dummy.vhd:34
in I_CLK100 slbit
Definition: arty_dummy.vhd:28
out O_RGBLED2 slv3
Definition: arty_dummy.vhd:36
out O_RGBLED1 slv3
Definition: arty_dummy.vhd:35
out O_LED slv4
Definition: arty_dummy.vhd:33
std_logic_vector( 3 downto 0) slv4
Definition: slvtypes.vhd:36
std_logic_vector( 2 downto 0) slv3
Definition: slvtypes.vhd:35
std_logic slbit
Definition: slvtypes.vhd:30