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W11 CPU core and support modules
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tst_serloop_hiomap.vhd
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1-- $Id: tst_serloop_hiomap.vhd 1181 2019-07-08 17:00:50Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2011- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Module Name: tst_serloop_hiomap - syn
7-- Description: default human I/O mapper
8--
9-- Dependencies: -
10-- Test bench: -
11--
12-- Target Devices: generic
13-- Tool versions: ise 13.1-14.7; viv 2014.4-2015.4; ghdl 0.29-0.33
14--
15-- Revision History:
16-- Date Rev Version Comment
17-- 2011-12-09 437 1.0.2 rename serport stat->moni port
18-- 2011-11-16 426 1.0.1 setup leds and dps
19-- 2011-11-05 420 1.0 Initial version
20------------------------------------------------------------------------------
21--
22-- Usage of Switches, Buttons, LEDs:
23--
24-- BTN(3): -- unused --
25-- (2): -- unused --
26-- (1): load enables from SWI(7:4)
27-- SWI(7) -> ENAFTDI
28-- SWI(6) -> ENATHROTTLE
29-- SWI(5) -> ENAESC
30-- SWI(4) -> ENAXON
31-- (0): reset state [!! decoded by top level design !!]
32--
33-- SWI(7:4) select display or enable pattern (when BTN(1) pressed)
34-- (3) -- unused --
35-- (2:1): mode 00 idle
36-- 01 rxblast
37-- 10 txblast
38-- 11 loop
39-- SWI(0) 0 -> main board RS232 port
40-- 1 -> Pmod1 RS232 port
41--
42-- LED(7) enaesc
43-- (6) enaxon
44-- (5) rxfecnt > 0 (frame error)
45-- (4) rxoecnt > 0 (overrun error)
46-- (3) rxsecnt > 0 (sequence error)
47-- (2) abact (shows ab activity)
48-- (1) (not rxok) or (not txok) (shows back pressure)
49-- (0) rxact or txact (shows activity)
50--
51-- DSP data as selected by SWI(7:4)
52-- 0000 -> rxfecnt
53-- 0001 -> rxoecnt
54-- 0010 -> rxsecnt
55-- 0100 -> rxcnt.l
56-- 0101 -> rxcnt.h
57-- 0110 -> txcnt.l
58-- 0111 -> txcnt.h
59-- 1000 -> rxokcnt
60-- 1001 -> txokcnt
61-- 1010 -> rxuicnt,rxuidat
62-- 1111 -> abclkdiv
63--
64-- DP(3): not SER_MONI.txok (shows tx back pressure)
65-- (2): SER_MONI.txact (shows tx activity)
66-- (1): not SER_MONI.rxok (shows rx back pressure)
67-- (0): SER_MONI.rxact (shows rx activity)
68--
69
70library ieee;
71use ieee.std_logic_1164.all;
72use ieee.numeric_std.all;
73
74use work.slvtypes.all;
75use work.serportlib.all;
76use work.tst_serlooplib.all;
77
78-- ----------------------------------------------------------------------------
79
80entity tst_serloop_hiomap is -- default human I/O mapper
81 port (
82 CLK : in slbit; -- clock
83 RESET : in slbit; -- reset
84 HIO_CNTL : out hio_cntl_type; -- tester controls from hio
85 HIO_STAT : in hio_stat_type; -- tester status to diaplay by hio
86 SER_MONI : in serport_moni_type; -- serport monitor to display by hio
87 SWI : in slv8; -- switch settings
88 BTN : in slv4; -- button settings
89 LED : out slv8; -- led data
90 DSP_DAT : out slv16; -- display data
91 DSP_DP : out slv4 -- display decimal points
92 );
94
95architecture syn of tst_serloop_hiomap is
96
97 type regs_type is record
98 enaxon : slbit; -- enable xon/xoff handling
99 enaesc : slbit; -- enable xon/xoff escaping
100 enathrottle : slbit; -- enable 1 msec tx throttling
101 enaftdi : slbit; -- enable ftdi flush handling
102 dspdat : slv16; -- display data
103 end record regs_type;
104
105 constant regs_init : regs_type := (
106 '0','0','0','0', -- enaxon,enaesc,enathrottle,enaftdi
107 (others=>'0') -- dspdat
108
109 );
110
111 signal R_REGS : regs_type := regs_init; -- state registers
112 signal N_REGS : regs_type := regs_init; -- next value state regs
113
114begin
115
116 proc_regs: process (CLK)
117 begin
118
119 if rising_edge(CLK) then
120 if RESET = '1' then
121 R_REGS <= regs_init;
122 else
123 R_REGS <= N_REGS;
124 end if;
125 end if;
126
127 end process proc_regs;
128
129 proc_next: process (R_REGS, HIO_STAT, SER_MONI, SWI, BTN)
130
131 variable r : regs_type := regs_init;
132 variable n : regs_type := regs_init;
133
134 variable icntl : hio_cntl_type := hio_cntl_init;
135 variable iled : slv8 := (others=>'0');
136 variable idat : slv16 := (others=>'0');
137 variable idp : slv4 := (others=>'0');
138
139 begin
140
141 r := R_REGS;
142 n := R_REGS;
143
144 icntl := hio_cntl_init;
145 iled := (others=>'0');
146 idat := (others=>'0');
147 idp := (others=>'0');
148
149 -- handle BTN(1) "load enables" press
150
151 if BTN(1) = '1' then
152 n.enaxon := SWI(4);
153 n.enaesc := SWI(5);
154 n.enathrottle := SWI(6);
155 n.enaftdi := SWI(7);
156 end if;
157
158 -- setup tester controls
159
160 icntl.mode := SWI(2 downto 1);
161 icntl.enaxon := r.enaxon;
162 icntl.enaesc := r.enaesc;
163 icntl.enathrottle := r.enathrottle;
164 icntl.enaftdi := r.enaftdi;
165
166 -- setup leds
167 iled(7) := icntl.enaesc;
168 iled(6) := icntl.enaxon;
169 if unsigned(HIO_STAT.rxfecnt) > 0 then iled(5) := '1'; end if;
170 if unsigned(HIO_STAT.rxoecnt) > 0 then iled(4) := '1'; end if;
171 if unsigned(HIO_STAT.rxsecnt) > 0 then iled(3) := '1'; end if;
172 iled(2) := SER_MONI.abact;
173 iled(1) := (not SER_MONI.rxok) or (not SER_MONI.txok);
174 iled(0) := SER_MONI.rxact or SER_MONI.txact;
175
176 -- setup display data
177
178 case SWI(7 downto 4) is
179 when "0000" => idat := HIO_STAT.rxfecnt;
180 when "0001" => idat := HIO_STAT.rxoecnt;
181 when "0010" => idat := HIO_STAT.rxsecnt;
182 when "0100" => idat := HIO_STAT.rxcnt(15 downto 0);
183 when "0101" => idat := HIO_STAT.rxcnt(31 downto 16);
184 when "0110" => idat := HIO_STAT.txcnt(15 downto 0);
185 when "0111" => idat := HIO_STAT.txcnt(31 downto 16);
186 when "1000" => idat := HIO_STAT.rxokcnt;
187 when "1001" => idat := HIO_STAT.txokcnt;
188 when "1010" => idat := HIO_STAT.rxuicnt & HIO_STAT.rxuidat;
189 when "1111" => idat := SER_MONI.abclkdiv;
190 when others => null;
191 end case;
192 n.dspdat := idat;
193
194 -- setup display decimal points
195
196 idp(3) := not SER_MONI.txok; -- tx back pressure
197 idp(2) := SER_MONI.txact; -- tx activity
198 idp(1) := not SER_MONI.rxok; -- rx back pressure
199 idp(0) := SER_MONI.rxact; -- rx activity
200
201 N_REGS <= n;
202
203 HIO_CNTL <= icntl;
204 LED <= iled;
205 DSP_DAT <= r.dspdat;
206 DSP_DP <= idp;
207
208 end process proc_next;
209
210end syn;
std_logic_vector( 3 downto 0) slv4
Definition: slvtypes.vhd:36
std_logic_vector( 15 downto 0) slv16
Definition: slvtypes.vhd:48
std_logic slbit
Definition: slvtypes.vhd:30
std_logic_vector( 7 downto 0) slv8
Definition: slvtypes.vhd:40
regs_type := regs_init N_REGS
regs_type :=( '0', '0', '0', '0',( others => '0')) regs_init
regs_type := regs_init R_REGS
in HIO_STAT hio_stat_type
in SER_MONI serport_moni_type
out HIO_CNTL hio_cntl_type