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W11 CPU core and support modules
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pdp11_lunit.vhd
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1-- $Id: pdp11_lunit.vhd 1181 2019-07-08 17:00:50Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Module Name: pdp11_lunit - syn
7-- Description: pdp11: logic unit for data (lunit)
8--
9-- Dependencies: -
10-- Test bench: tb/tb_pdp11_core (implicit)
11-- Target Devices: generic
12-- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31
13-- Revision History:
14-- Date Rev Version Comment
15-- 2014-08-10 581 1.1.2 use c_cc_f_*
16-- 2011-11-18 427 1.1.1 now numeric_std clean
17-- 2010-09-18 300 1.1 renamed from lbox
18-- 2008-03-30 131 1.0.2 BUGFIX: SXT clears V condition code
19-- 2007-06-14 56 1.0.1 Use slvtypes.all
20-- 2007-05-12 26 1.0 Initial version
21------------------------------------------------------------------------------
22
23library ieee;
24use ieee.std_logic_1164.all;
25use ieee.numeric_std.all;
26
27use work.slvtypes.all;
28use work.pdp11.all;
29
30-- ----------------------------------------------------------------------------
31
32entity pdp11_lunit is -- logic unit for data (lunit)
33 port (
34 DSRC : in slv16; -- 'src' data in
35 DDST : in slv16; -- 'dst' data in
36 CCIN : in slv4; -- condition codes in
37 FUNC : in slv4; -- function
38 BYTOP : in slbit; -- byte operation
39 DOUT : out slv16; -- data output
40 CCOUT : out slv4 -- condition codes out
41 );
42end pdp11_lunit;
43
44architecture syn of pdp11_lunit is
45
46-- --------------------------------------
47
48begin
49
50 process (DSRC, DDST, CCIN, FUNC, BYTOP)
51 variable iout : slv16 := (others=>'0');
52 variable inzstd : slbit := '0';
53 variable ino : slbit := '0';
54 variable izo : slbit := '0';
55 variable ivo : slbit := '0';
56 variable ico : slbit := '0';
57
58 alias DSRC_L : slv8 is DSRC(7 downto 0);
59 alias DSRC_H : slv8 is DSRC(15 downto 8);
60 alias DDST_L : slv8 is DDST(7 downto 0);
61 alias DDST_H : slv8 is DDST(15 downto 8);
62 alias NI : slbit is CCIN(c_cc_f_n);
63 alias ZI : slbit is CCIN(c_cc_f_z);
64 alias VI : slbit is CCIN(c_cc_f_v);
65 alias CI : slbit is CCIN(c_cc_f_c);
66 alias iout_l : slv8 is iout(7 downto 0);
67 alias iout_h : slv8 is iout(15 downto 8);
68
69 begin
70
71 iout := (others=>'0');
72 inzstd := '1'; -- use standard logic by default
73 ino := '0';
74 izo := '0';
75 ivo := '0';
76 ico := '0';
77
78--
79-- the decoding of FUNC is done "manually" to get a structure based on
80-- a 8->1 pattern. This matches the opcode structure and seems most
81-- efficient.
82--
83
84 if FUNC(3) = '0' then
85 if BYTOP = '0' then
86
87 case FUNC(2 downto 0) is
88 when "000" => -- ASR
89 iout := DDST(15) & DDST(15 downto 1);
90 ico := DDST(0);
91 ivo := iout(15) xor ico;
92
93 when "001" => -- ASL
94 iout := DDST(14 downto 0) & '0';
95 ico := DDST(15);
96 ivo := iout(15) xor ico;
97
98 when "010" => -- ROR
99 iout := CI & DDST(15 downto 1);
100 ico := DDST(0);
101 ivo := iout(15) xor ico;
102
103 when "011" => -- ROL
104 iout := DDST(14 downto 0) & CI;
105 ico := DDST(15);
106 ivo := iout(15) xor ico;
107
108 when "100" => -- BIS
109 iout := DDST or DSRC;
110 ico := CI;
111
112 when "101" => -- BIC
113 iout := DDST and not DSRC;
114 ico := CI;
115
116 when "110" => -- BIT
117 iout := DDST and DSRC;
118 ico := CI;
119
120 when "111" => -- MOV
121 iout := DSRC;
122 ico := CI;
123 when others => null;
124 end case;
125
126 else
127
128 case FUNC(2 downto 0) is
129 when "000" => -- ASRB
130 iout_l := DDST_L(7) & DDST_L(7 downto 1);
131 ico := DDST_L(0);
132 ivo := iout_l(7) xor ico;
133
134 when "001" => -- ASLB
135 iout_l := DDST(6 downto 0) & '0';
136 ico := DDST(7);
137 ivo := iout_l(7) xor ico;
138
139 when "010" => -- RORB
140 iout_l := CI & DDST_L(7 downto 1);
141 ico := DDST_L(0);
142 ivo := iout_l(7) xor ico;
143
144 when "011" => -- ROLB
145 iout_l := DDST_L(6 downto 0) & CI;
146 ico := DDST_L(7);
147 ivo := iout_l(7) xor ico;
148
149 when "100" => -- BISB
150 iout_l := DDST_L or DSRC_L;
151 ico := CI;
152
153 when "101" => -- BICB
154 iout_l := DDST_L and not DSRC_L;
155 ico := CI;
156
157 when "110" => -- BITB
158 iout_l := DDST_L and DSRC_L;
159 ico := CI;
160
161 when "111" => -- MOVB
162 iout_l := DSRC_L;
163 iout_h := (others=>DSRC_L(7));
164 ico := CI;
165 when others => null;
166 end case;
167 end if;
168
169 else
170 case FUNC(2 downto 0) is
171 when "000" => -- SXT
172 iout := (others=>NI);
173 inzstd := '0';
174 ino := NI;
175 izo := not NI;
176 ivo := '0';
177 ico := CI;
178
179 when "001" => -- SWAP
180 iout := DDST_L & DDST_H;
181 inzstd := '0';
182 ino := iout(7);
183 if unsigned(iout(7 downto 0)) = 0 then
184 izo := '1';
185 else
186 izo := '0';
187 end if;
188
189 when "010" => -- XOR
190 iout := DDST xor DSRC;
191 ico := CI;
192
193 when others => null;
194
195 end case;
196 end if;
197
198 DOUT <= iout;
199
200 if inzstd = '1' then
201 if BYTOP = '1' then
202 ino := iout(7);
203 if unsigned(iout(7 downto 0)) = 0 then
204 izo := '1';
205 else
206 izo := '0';
207 end if;
208 else
209 ino := iout(15);
210 if unsigned(iout) = 0 then
211 izo := '1';
212 else
213 izo := '0';
214 end if;
215 end if;
216 end if;
217
218 CCOUT(3) <= ino;
219 CCOUT(2) <= izo;
220 CCOUT(1) <= ivo;
221 CCOUT(0) <= ico;
222
223 end process;
224
225end syn;
pdp11_lunit.syn
Definition: pdp11_lunit.vhd:44
pdp11_lunit
Definition: pdp11_lunit.vhd:32
pdp11_lunit.CCOUT
out CCOUT slv4
Definition: pdp11_lunit.vhd:41
pdp11_lunit.DDST
in DDST slv16
Definition: pdp11_lunit.vhd:35
pdp11_lunit.BYTOP
in BYTOP slbit
Definition: pdp11_lunit.vhd:38
pdp11_lunit.DSRC
in DSRC slv16
Definition: pdp11_lunit.vhd:34
pdp11_lunit.FUNC
in FUNC slv4
Definition: pdp11_lunit.vhd:37
pdp11_lunit.DOUT
out DOUT slv16
Definition: pdp11_lunit.vhd:39
pdp11_lunit.CCIN
in CCIN slv4
Definition: pdp11_lunit.vhd:36
pdp11
Definition: pdp11.vhd:123
slvtypes.slv4
std_logic_vector( 3 downto 0) slv4
Definition: slvtypes.vhd:36
slvtypes.slv16
std_logic_vector( 15 downto 0) slv16
Definition: slvtypes.vhd:48
slvtypes.slbit
std_logic slbit
Definition: slvtypes.vhd:30
slvtypes.slv8
std_logic_vector( 7 downto 0) slv8
Definition: slvtypes.vhd:40