usr_access_unisim Entity Reference

Inheritance diagram for usr_access_unisim:

Entities
syn	architecture

Libraries
ieee
unisim

Use Clauses
std_logic_1164
vcomponents
slvtypes	Package <slvtypes>

Ports
DATA	out	slv32

Detailed Description

Definition at line 27 of file usr_access_unisim.vhd.

Member Data Documentation

DATA

DATA out slv32

Port

Definition at line 30 of file usr_access_unisim.vhd.

ieee

ieee

Library

Definition at line 19 of file usr_access_unisim.vhd.

std_logic_1164

std_logic_1164

use clause

Definition at line 20 of file usr_access_unisim.vhd.

unisim

unisim

Library

Definition at line 22 of file usr_access_unisim.vhd.

vcomponents

vcomponents

use clause

Definition at line 23 of file usr_access_unisim.vhd.

slvtypes

slvtypes

use clause

Definition at line 25 of file usr_access_unisim.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/xlib/usr_access_unisim.vhd