w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Instantiations | Processes | Signals
sim Architecture Reference
Architecture >> sim

Processes

proc_simbus  ( SB_VAL )

Constants

sbaddr_swi  slv8 := slv ( to_unsigned ( 16 , 8 ) )
sbaddr_btn  slv8 := slv ( to_unsigned ( 17 , 8 ) )
pcb_delay  Delay_length := 1 ns

Signals

MM_MEM_CE_N  slv2 := ( others = > ' 1 ' )
MM_MEM_BE_N  slv4 := ( others = > ' 1 ' )
MM_MEM_WE_N  slbit := ' 1 '
MM_MEM_OE_N  slbit := ' 1 '
MM_MEM_ADDR  slv18 := ( others = > ' Z ' )
MM_MEM_DATA  slv32 := ( others = > ' 0 ' )
R_SWI  slv8 := ( others = > ' 0 ' )
R_BTN  slv4 := ( others = > ' 0 ' )

Instantiations

busdly  simbididly <Entity simbididly>
mem_l  is61lv25616al <Entity is61lv25616al>
mem_u  is61lv25616al <Entity is61lv25616al>

Detailed Description

Definition at line 47 of file tb_s3board_core.vhd.

Member Function/Procedure/Process Documentation

◆ proc_simbus()

proc_simbus (   SB_VAL)

Definition at line 101 of file tb_s3board_core.vhd.

Member Data Documentation

◆ MM_MEM_CE_N

MM_MEM_CE_N slv2 := ( others = > ' 1 ' )
Signal

Definition at line 49 of file tb_s3board_core.vhd.

◆ MM_MEM_BE_N

MM_MEM_BE_N slv4 := ( others = > ' 1 ' )
Signal

Definition at line 50 of file tb_s3board_core.vhd.

◆ MM_MEM_WE_N

MM_MEM_WE_N slbit := ' 1 '
Signal

Definition at line 51 of file tb_s3board_core.vhd.

◆ MM_MEM_OE_N

MM_MEM_OE_N slbit := ' 1 '
Signal

Definition at line 52 of file tb_s3board_core.vhd.

◆ MM_MEM_ADDR

MM_MEM_ADDR slv18 := ( others = > ' Z ' )
Signal

Definition at line 53 of file tb_s3board_core.vhd.

◆ MM_MEM_DATA

MM_MEM_DATA slv32 := ( others = > ' 0 ' )
Signal

Definition at line 54 of file tb_s3board_core.vhd.

◆ R_SWI

R_SWI slv8 := ( others = > ' 0 ' )
Signal

Definition at line 56 of file tb_s3board_core.vhd.

◆ R_BTN

R_BTN slv4 := ( others = > ' 0 ' )
Signal

Definition at line 57 of file tb_s3board_core.vhd.

◆ sbaddr_swi

sbaddr_swi slv8 := slv ( to_unsigned ( 16 , 8 ) )
Constant

Definition at line 59 of file tb_s3board_core.vhd.

◆ sbaddr_btn

sbaddr_btn slv8 := slv ( to_unsigned ( 17 , 8 ) )
Constant

Definition at line 60 of file tb_s3board_core.vhd.

◆ pcb_delay

pcb_delay Delay_length := 1 ns
Constant

Definition at line 61 of file tb_s3board_core.vhd.

◆ busdly

busdly simbididly
Instantiation

Definition at line 77 of file tb_s3board_core.vhd.

◆ mem_l

mem_l 61lv25616al
Instantiation

Definition at line 88 of file tb_s3board_core.vhd.

◆ mem_u

mem_u 61lv25616al
Instantiation

Definition at line 99 of file tb_s3board_core.vhd.

The documentation for this design unit was generated from the following file: