simbididly Entity Reference

Inheritance diagram for simbididly:

Entities
sim	architecture

Libraries
ieee

Use Clauses
std_logic_1164
numeric_std
slvtypes	Package <slvtypes>

Generics
DELAY	Delay_length
DWIDTH	positive := 16

Ports
A	inout	slv ( DWIDTH - 1 downto 0 )
B	inout	slv ( DWIDTH - 1 downto 0 )

Detailed Description

Definition at line 25 of file simbididly.vhd.

Member Data Documentation

DELAY

DELAY Delay_length

Generic

Definition at line 27 of file simbididly.vhd.

DWIDTH

DWIDTH positive := 16

Generic

Definition at line 28 of file simbididly.vhd.

A

A inout slv ( DWIDTH - 1 downto 0 )

Port

Definition at line 30 of file simbididly.vhd.

B

B inout slv ( DWIDTH - 1 downto 0 )

Port

Definition at line 32 of file simbididly.vhd.

ieee

ieee

Library

Definition at line 20 of file simbididly.vhd.

std_logic_1164

std_logic_1164

use clause

Definition at line 21 of file simbididly.vhd.

numeric_std

numeric_std

use clause

Definition at line 22 of file simbididly.vhd.

slvtypes

slvtypes

use clause

Definition at line 23 of file simbididly.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/simlib/simbididly.vhd