w11 - vhd 0.794
W11 CPU core and support modules
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syn Architecture Reference
Architecture >> syn

Signals

MIG_BUSY  slbit := ' 0 '
APP_RDY  slbit := ' 0 '
APP_EN  slbit := ' 0 '
APP_CMD  slv3 := ( others = > ' 0 ' )
APP_ADDR  slv ( mig_mawidth- 1 downto 0 ) := ( others = > ' 0 ' )
APP_WDF_RDY  slbit := ' 0 '
APP_WDF_WREN  slbit := ' 0 '
APP_WDF_DATA  slv ( mig_dwidth- 1 downto 0 ) := ( others = > ' 0 ' )
APP_WDF_MASK  slv ( mig_mwidth- 1 downto 0 ) := ( others = > ' 0 ' )
APP_WDF_END  slbit := ' 0 '
APP_RD_DATA_VALID  slbit := ' 0 '
APP_RD_DATA  slv ( mig_dwidth- 1 downto 0 ) := ( others = > ' 0 ' )
APP_RD_DATA_END  slbit := ' 0 '
UI_CLK_SYNC_RST  slbit := ' 0 '
INIT_CALIB_COMPLETE  slbit := ' 0 '
SYS_RST  slbit := ' 0 '
SYS_RST_BUSY  slbit := ' 0 '
CLKMUI  slbit := ' 0 '
TEMP_MUI  slv12 := ( others = > ' 0 ' )

Instantiations

sr2mig  sramif2migui_core <Entity sramif2migui_core>
cdc_sysrst  cdc_pulse <Entity cdc_pulse>
cdc_temp  cdc_value <Entity cdc_value>
mig_ctl  migui_arty <Entity migui_arty>

Detailed Description

Definition at line 71 of file sramif_mig_arty.vhd.

Member Data Documentation

◆ MIG_BUSY

MIG_BUSY slbit := ' 0 '
Signal

Definition at line 73 of file sramif_mig_arty.vhd.

◆ APP_RDY

APP_RDY slbit := ' 0 '
Signal

Definition at line 75 of file sramif_mig_arty.vhd.

◆ APP_EN

APP_EN slbit := ' 0 '
Signal

Definition at line 76 of file sramif_mig_arty.vhd.

◆ APP_CMD

APP_CMD slv3 := ( others = > ' 0 ' )
Signal

Definition at line 77 of file sramif_mig_arty.vhd.

◆ APP_ADDR

APP_ADDR slv ( mig_mawidth- 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 78 of file sramif_mig_arty.vhd.

◆ APP_WDF_RDY

APP_WDF_RDY slbit := ' 0 '
Signal

Definition at line 79 of file sramif_mig_arty.vhd.

◆ APP_WDF_WREN

APP_WDF_WREN slbit := ' 0 '
Signal

Definition at line 80 of file sramif_mig_arty.vhd.

◆ APP_WDF_DATA

APP_WDF_DATA slv ( mig_dwidth- 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 81 of file sramif_mig_arty.vhd.

◆ APP_WDF_MASK

APP_WDF_MASK slv ( mig_mwidth- 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 82 of file sramif_mig_arty.vhd.

◆ APP_WDF_END

APP_WDF_END slbit := ' 0 '
Signal

Definition at line 83 of file sramif_mig_arty.vhd.

◆ APP_RD_DATA_VALID

APP_RD_DATA_VALID slbit := ' 0 '
Signal

Definition at line 84 of file sramif_mig_arty.vhd.

◆ APP_RD_DATA

APP_RD_DATA slv ( mig_dwidth- 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 85 of file sramif_mig_arty.vhd.

◆ APP_RD_DATA_END

APP_RD_DATA_END slbit := ' 0 '
Signal

Definition at line 86 of file sramif_mig_arty.vhd.

◆ UI_CLK_SYNC_RST

UI_CLK_SYNC_RST slbit := ' 0 '
Signal

Definition at line 88 of file sramif_mig_arty.vhd.

◆ INIT_CALIB_COMPLETE

INIT_CALIB_COMPLETE slbit := ' 0 '
Signal

Definition at line 89 of file sramif_mig_arty.vhd.

◆ SYS_RST

SYS_RST slbit := ' 0 '
Signal

Definition at line 91 of file sramif_mig_arty.vhd.

◆ SYS_RST_BUSY

SYS_RST_BUSY slbit := ' 0 '
Signal

Definition at line 92 of file sramif_mig_arty.vhd.

◆ CLKMUI

CLKMUI slbit := ' 0 '
Signal

Definition at line 94 of file sramif_mig_arty.vhd.

◆ TEMP_MUI

TEMP_MUI slv12 := ( others = > ' 0 ' )
Signal

Definition at line 95 of file sramif_mig_arty.vhd.

◆ sr2mig

sr2mig sramif2migui_core
Instantiation

Definition at line 133 of file sramif_mig_arty.vhd.

◆ cdc_sysrst

cdc_sysrst cdc_pulse
Instantiation

Definition at line 146 of file sramif_mig_arty.vhd.

◆ cdc_temp

cdc_temp cdc_value
Instantiation

Definition at line 157 of file sramif_mig_arty.vhd.

◆ mig_ctl

mig_ctl migui_arty
Instantiation

Definition at line 201 of file sramif_mig_arty.vhd.


The documentation for this design unit was generated from the following file: