syn Architecture Reference

Architecture >> syn

Signals
RL_DI	slv9 := ( others = > ' 0 ' )
RL_ENA	slbit := ' 0 '
RL_BUSY	slbit := ' 0 '
RL_DO	slv9 := ( others = > ' 0 ' )
RL_VAL	slbit := ' 0 '
RL_HOLD	slbit := ' 0 '
RLB_BUSY_L	slbit := ' 0 '
RLB_DO_L	slv8 := ( others = > ' 0 ' )
RLB_VAL_L	slbit := ' 0 '

Instantiations
rl	rlink_core <Entity rlink_core>
b2cd	byte2cdata <Entity byte2cdata>
cd2b	cdata2byte <Entity cdata2byte>
mon	rlink_mon_sb <Entity rlink_mon_sb>

Detailed Description

Definition at line 69 of file rlink_core8.vhd.

Member Data Documentation

RL_DI

RL_DI slv9 := ( others = > ' 0 ' )

Signal

Definition at line 71 of file rlink_core8.vhd.

RL_ENA

RL_ENA slbit := ' 0 '

Signal

Definition at line 72 of file rlink_core8.vhd.

RL_BUSY

RL_BUSY slbit := ' 0 '

Signal

Definition at line 73 of file rlink_core8.vhd.

RL_DO

RL_DO slv9 := ( others = > ' 0 ' )

Signal

Definition at line 74 of file rlink_core8.vhd.

RL_VAL

RL_VAL slbit := ' 0 '

Signal

Definition at line 75 of file rlink_core8.vhd.

RL_HOLD

RL_HOLD slbit := ' 0 '

Signal

Definition at line 76 of file rlink_core8.vhd.

RLB_BUSY_L

RLB_BUSY_L slbit := ' 0 '

Signal

Definition at line 77 of file rlink_core8.vhd.

RLB_DO_L

RLB_DO_L slv8 := ( others = > ' 0 ' )

Signal

Definition at line 78 of file rlink_core8.vhd.

RLB_VAL_L

RLB_VAL_L slbit := ' 0 '

Signal

Definition at line 79 of file rlink_core8.vhd.

rl

rl rlink_core

Instantiation

Definition at line 105 of file rlink_core8.vhd.

b2cd

b2cd byte2cdata

Instantiation

Definition at line 119 of file rlink_core8.vhd.

cd2b

cd2b cdata2byte

Instantiation

Definition at line 134 of file rlink_core8.vhd.

mon

mon rlink_mon_sb

Instantiation

Definition at line 155 of file rlink_core8.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/rlink/rlink_core8.vhd