w11 - vhd 0.794
W11 CPU core and support modules
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syn Architecture Reference
Architecture >> syn

Processes

proc_regs  ( CLK )
proc_mux  ( R_DIM , R_COL , R_LED , DATR , DATG , DATB )

Signals

R_LED  slv4 := " 0001 "
R_COL  slv3 := " 001 "
R_DIM  slbit := ' 1 '
RGB0  slv3 := ( others = > ' 0 ' )
RGB1  slv3 := ( others = > ' 0 ' )
RGB2  slv3 := ( others = > ' 0 ' )
RGB3  slv3 := ( others = > ' 0 ' )

Instantiations

iob_rgb0  iob_reg_o_gen <Entity iob_reg_o_gen>
iob_rgb1  iob_reg_o_gen <Entity iob_reg_o_gen>
iob_rgb2  iob_reg_o_gen <Entity iob_reg_o_gen>
iob_rgb3  iob_reg_o_gen <Entity iob_reg_o_gen>

Detailed Description

Definition at line 43 of file rgbdrv_3x4mux.vhd.

Member Function/Procedure/Process Documentation

◆ proc_regs()

proc_regs (   CLK)

Definition at line 69 of file rgbdrv_3x4mux.vhd.

◆ proc_mux()

proc_mux (   R_DIM ,
  R_COL ,
  R_LED ,
  DATR ,
  DATG ,
  DATB  
)
Process

Definition at line 92 of file rgbdrv_3x4mux.vhd.

Member Data Documentation

◆ R_LED

R_LED slv4 := " 0001 "
Signal

Definition at line 45 of file rgbdrv_3x4mux.vhd.

◆ R_COL

R_COL slv3 := " 001 "
Signal

Definition at line 46 of file rgbdrv_3x4mux.vhd.

◆ R_DIM

R_DIM slbit := ' 1 '
Signal

Definition at line 47 of file rgbdrv_3x4mux.vhd.

◆ RGB0

RGB0 slv3 := ( others = > ' 0 ' )
Signal

Definition at line 49 of file rgbdrv_3x4mux.vhd.

◆ RGB1

RGB1 slv3 := ( others = > ' 0 ' )
Signal

Definition at line 50 of file rgbdrv_3x4mux.vhd.

◆ RGB2

RGB2 slv3 := ( others = > ' 0 ' )
Signal

Definition at line 51 of file rgbdrv_3x4mux.vhd.

◆ RGB3

RGB3 slv3 := ( others = > ' 0 ' )
Signal

Definition at line 52 of file rgbdrv_3x4mux.vhd.

◆ iob_rgb0

iob_rgb0 iob_reg_o_gen
Instantiation

Definition at line 58 of file rgbdrv_3x4mux.vhd.

◆ iob_rgb1

iob_rgb1 iob_reg_o_gen
Instantiation

Definition at line 61 of file rgbdrv_3x4mux.vhd.

◆ iob_rgb2

iob_rgb2 iob_reg_o_gen
Instantiation

Definition at line 64 of file rgbdrv_3x4mux.vhd.

◆ iob_rgb3

iob_rgb3 iob_reg_o_gen
Instantiation

Definition at line 67 of file rgbdrv_3x4mux.vhd.


The documentation for this design unit was generated from the following file: