w11 - vhd 0.794
W11 CPU core and support modules
Loading...
Searching...
No Matches
Generics | Libraries | Ports | Use Clauses
ram_1swsr_xfirst_gen_unisim Entity Reference
Inheritance diagram for ram_1swsr_xfirst_gen_unisim:
[legend]

Entities

syn  architecture
 

Libraries

ieee 
unisim 

Use Clauses

std_logic_1164 
vcomponents 
slvtypes  Package <slvtypes>

Generics

AWIDTH  positive := 11
DWIDTH  positive := 9
WRITE_MODE  string := " READ_FIRST "

Ports

CLK   in   slbit
EN   in   slbit
WE   in   slbit
ADDR   in   slv ( AWIDTH - 1 downto 0 )
DI   in   slv ( DWIDTH - 1 downto 0 )
DO   out   slv ( DWIDTH - 1 downto 0 )

Detailed Description

Definition at line 29 of file ram_1swsr_xfirst_gen_unisim.vhd.

Member Data Documentation

◆ AWIDTH

AWIDTH positive := 11
Generic

Definition at line 31 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ DWIDTH

DWIDTH positive := 9
Generic

Definition at line 32 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ WRITE_MODE

WRITE_MODE string := " READ_FIRST "
Generic

Definition at line 33 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ CLK

CLK in slbit
Port

Definition at line 35 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ EN

EN in slbit
Port

Definition at line 36 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ WE

WE in slbit
Port

Definition at line 37 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ ADDR

ADDR in slv ( AWIDTH - 1 downto 0 )
Port

Definition at line 38 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ DI

DI in slv ( DWIDTH - 1 downto 0 )
Port

Definition at line 39 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ DO

DO out slv ( DWIDTH - 1 downto 0 )
Port

Definition at line 41 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ ieee

ieee
Library

Definition at line 21 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ std_logic_1164

std_logic_1164
use clause

Definition at line 22 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ unisim

unisim
Library

Definition at line 24 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ vcomponents

vcomponents
use clause

Definition at line 25 of file ram_1swsr_xfirst_gen_unisim.vhd.

◆ slvtypes

slvtypes
use clause

Definition at line 27 of file ram_1swsr_xfirst_gen_unisim.vhd.

The documentation for this design unit was generated from the following file: