w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Processes | Records | Signals
syn Architecture Reference
Architecture >> syn

Processes

proc_regs  ( CLK )
proc_next  ( R_REGS , CE_MSEC , SWI , BTN , BTN4 )

Constants

c_mode_rndm  slv2 := " 00 "
c_mode_cnt  slv2 := " 01 "
c_mode_swi  slv2 := " 10 "
c_mode_btst  slv2 := " 11 "
rndminit  slv8 := " 01010101 "
btnzero  slv ( BWIDTH - 1 downto 0 ) := ( others = > ' 0 ' )
regs_init  regs_type := ( c_mode_rndm , ' 0 ' , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , rndminit , ( others = > ' 0 ' ) , btnzero , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) )

Signals

R_REGS  regs_type := regs_init
N_REGS  regs_type := regs_init
BTN4  slbit := ' 0 '

Records

regs_type 
mode slv2
allon slbit
cnt slv16
tcnt slv16
rndm slv8
swi_1 slv8
btn_1 slv ( BWIDTH - 1 downto 0 )
led slv8
dsp slv16
dp slv4

Detailed Description

Definition at line 46 of file tst_snhumanio.vhd.

Member Function/Procedure/Process Documentation

◆ proc_regs()

proc_regs (   CLK  
)
Process

Definition at line 105 of file tst_snhumanio.vhd.

◆ proc_next()

proc_next (   R_REGS ,
  CE_MSEC ,
  SWI ,
  BTN ,
  BTN4  
)
Process

Definition at line 118 of file tst_snhumanio.vhd.

Member Data Documentation

◆ c_mode_rndm

c_mode_rndm slv2 := " 00 "
Constant

Definition at line 48 of file tst_snhumanio.vhd.

◆ c_mode_cnt

c_mode_cnt slv2 := " 01 "
Constant

Definition at line 49 of file tst_snhumanio.vhd.

◆ c_mode_swi

c_mode_swi slv2 := " 10 "
Constant

Definition at line 50 of file tst_snhumanio.vhd.

◆ c_mode_btst

c_mode_btst slv2 := " 11 "
Constant

Definition at line 51 of file tst_snhumanio.vhd.

◆ regs_type

regs_type
Record

Definition at line 53 of file tst_snhumanio.vhd.

◆ mode

mode slv2
Record

Definition at line 54 of file tst_snhumanio.vhd.

◆ allon

allon slbit
Record

Definition at line 55 of file tst_snhumanio.vhd.

◆ cnt

cnt slv16
Record

Definition at line 56 of file tst_snhumanio.vhd.

◆ tcnt

tcnt slv16
Record

Definition at line 57 of file tst_snhumanio.vhd.

◆ rndm

rndm slv8
Record

Definition at line 58 of file tst_snhumanio.vhd.

◆ swi_1

swi_1 slv8
Record

Definition at line 59 of file tst_snhumanio.vhd.

◆ btn_1

btn_1 slv ( BWIDTH - 1 downto 0 )
Record

Definition at line 60 of file tst_snhumanio.vhd.

◆ led

led slv8
Record

Definition at line 61 of file tst_snhumanio.vhd.

◆ dsp

dsp slv16
Record

Definition at line 62 of file tst_snhumanio.vhd.

◆ dp

dp slv4
Record

Definition at line 63 of file tst_snhumanio.vhd.

◆ rndminit

rndminit slv8 := " 01010101 "
Constant

Definition at line 69 of file tst_snhumanio.vhd.

◆ btnzero

btnzero slv ( BWIDTH - 1 downto 0 ) := ( others = > ' 0 ' )
Constant

Definition at line 71 of file tst_snhumanio.vhd.

◆ regs_init

regs_init regs_type := ( c_mode_rndm , ' 0 ' , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , rndminit , ( others = > ' 0 ' ) , btnzero , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) )
Constant

Definition at line 73 of file tst_snhumanio.vhd.

◆ R_REGS

R_REGS regs_type := regs_init
Signal

Definition at line 87 of file tst_snhumanio.vhd.

◆ N_REGS

N_REGS regs_type := regs_init
Signal

Definition at line 88 of file tst_snhumanio.vhd.

◆ BTN4

BTN4 slbit := ' 0 '
Signal

Definition at line 90 of file tst_snhumanio.vhd.

The documentation for this design unit was generated from the following file: