syn Architecture Reference

Architecture >> syn

Constants
CDWIDTH	positive := 13
c_cdinit	natural := 0

Signals
RB_MREQ	rb_mreq_type := rb_mreq_init
RB_SRES	rb_sres_type := rb_sres_init
RLB_DI	slv8 := ( others = > ' 0 ' )
RLB_ENA	slbit := ' 0 '
RLB_BUSY	slbit := ' 0 '
RLB_DO	slv8 := ( others = > ' 0 ' )
RLB_VAL	slbit := ' 0 '
RLB_HOLD	slbit := ' 0 '

Instantiations
rlink	rlink_sp1c <Entity rlink_sp1c>

Detailed Description

Definition at line 85 of file tbu_rlink_sp1c.vhd.

Member Data Documentation

CDWIDTH

CDWIDTH positive := 13

Constant

Definition at line 87 of file tbu_rlink_sp1c.vhd.

c_cdinit

c_cdinit natural := 0

Constant

Definition at line 88 of file tbu_rlink_sp1c.vhd.

RB_MREQ

RB_MREQ rb_mreq_type := rb_mreq_init

Signal

Definition at line 90 of file tbu_rlink_sp1c.vhd.

RB_SRES

RB_SRES rb_sres_type := rb_sres_init

Signal

Definition at line 91 of file tbu_rlink_sp1c.vhd.

RLB_DI

RLB_DI slv8 := ( others = > ' 0 ' )

Signal

Definition at line 93 of file tbu_rlink_sp1c.vhd.

RLB_ENA

RLB_ENA slbit := ' 0 '

Signal

Definition at line 94 of file tbu_rlink_sp1c.vhd.

RLB_BUSY

RLB_BUSY slbit := ' 0 '

Signal

Definition at line 95 of file tbu_rlink_sp1c.vhd.

RLB_DO

RLB_DO slv8 := ( others = > ' 0 ' )

Signal

Definition at line 96 of file tbu_rlink_sp1c.vhd.

RLB_VAL

RLB_VAL slbit := ' 0 '

Signal

Definition at line 97 of file tbu_rlink_sp1c.vhd.

RLB_HOLD

RLB_HOLD slbit := ' 0 '

Signal

Definition at line 98 of file tbu_rlink_sp1c.vhd.

rlink

rlink rlink_sp1c

Instantiation

Definition at line 144 of file tbu_rlink_sp1c.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/rlink/tb/tbu_rlink_sp1c.vhd