w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Instantiations | Signals
syn Architecture Reference
Architecture >> syn

Constants

sysid_proj  slv16 := x " 0104 "
sysid_board  slv8 := x " 01 "
sysid_vers  slv8 := x " 00 "

Signals

CLK  slbit := ' 0 '
CE_USEC  slbit := ' 0 '
CE_MSEC  slbit := ' 0 '
GBL_RESET  slbit := ' 0 '
RXD  slbit := ' 1 '
TXD  slbit := ' 0 '
CTS_N  slbit := ' 0 '
RTS_N  slbit := ' 0 '
SWI  slv8 := ( others = > ' 0 ' )
BTN  slv4 := ( others = > ' 0 ' )
LED  slv8 := ( others = > ' 0 ' )
DSP_DAT  slv16 := ( others = > ' 0 ' )
DSP_DP  slv4 := ( others = > ' 0 ' )
RB_MREQ  rb_mreq_type := rb_mreq_init
RB_SRES  rb_sres_type := rb_sres_init
RB_LAM  slv16 := ( others = > ' 0 ' )
RB_STAT  slv4 := ( others = > ' 0 ' )
SER_MONI  serport_moni_type := serport_moni_init
RB_SRES_TST  rb_sres_type := rb_sres_init
RB_LAM_TST  slbit := ' 0 '
MEM_RESET  slbit := ' 0 '
MEM_REQ  slbit := ' 0 '
MEM_WE  slbit := ' 0 '
MEM_BUSY  slbit := ' 0 '
MEM_ACK_R  slbit := ' 0 '
MEM_ACK_W  slbit := ' 0 '
MEM_ACT_R  slbit := ' 0 '
MEM_ACT_W  slbit := ' 0 '
MEM_ADDR  slv18 := ( others = > ' 0 ' )
MEM_BE  slv4 := ( others = > ' 0 ' )
MEM_DI  slv32 := ( others = > ' 0 ' )
MEM_DO  slv32 := ( others = > ' 0 ' )

Instantiations

clkdiv  clkdivce <Entity clkdivce>
iob_rs232  bp_rs232_2line_iob <Entity bp_rs232_2line_iob>
hio  sn_humanio <Entity sn_humanio>
rlink  rlink_sp1c <Entity rlink_sp1c>
tst  tst_sram <Entity tst_sram>
sramctl  s3_sram_memctl <Entity s3_sram_memctl>

Detailed Description

Definition at line 106 of file sys_tst_sram_s3.vhd.

Member Data Documentation

◆ CLK

CLK slbit := ' 0 '
Signal

Definition at line 108 of file sys_tst_sram_s3.vhd.

◆ CE_USEC

CE_USEC slbit := ' 0 '
Signal

Definition at line 110 of file sys_tst_sram_s3.vhd.

◆ CE_MSEC

CE_MSEC slbit := ' 0 '
Signal

Definition at line 111 of file sys_tst_sram_s3.vhd.

◆ GBL_RESET

GBL_RESET slbit := ' 0 '
Signal

Definition at line 113 of file sys_tst_sram_s3.vhd.

◆ RXD

RXD slbit := ' 1 '
Signal

Definition at line 115 of file sys_tst_sram_s3.vhd.

◆ TXD

TXD slbit := ' 0 '
Signal

Definition at line 116 of file sys_tst_sram_s3.vhd.

◆ CTS_N

CTS_N slbit := ' 0 '
Signal

Definition at line 117 of file sys_tst_sram_s3.vhd.

◆ RTS_N

RTS_N slbit := ' 0 '
Signal

Definition at line 118 of file sys_tst_sram_s3.vhd.

◆ SWI

SWI slv8 := ( others = > ' 0 ' )
Signal

Definition at line 120 of file sys_tst_sram_s3.vhd.

◆ BTN

BTN slv4 := ( others = > ' 0 ' )
Signal

Definition at line 121 of file sys_tst_sram_s3.vhd.

◆ LED

LED slv8 := ( others = > ' 0 ' )
Signal

Definition at line 122 of file sys_tst_sram_s3.vhd.

◆ DSP_DAT

DSP_DAT slv16 := ( others = > ' 0 ' )
Signal

Definition at line 123 of file sys_tst_sram_s3.vhd.

◆ DSP_DP

DSP_DP slv4 := ( others = > ' 0 ' )
Signal

Definition at line 124 of file sys_tst_sram_s3.vhd.

◆ RB_MREQ

RB_MREQ rb_mreq_type := rb_mreq_init
Signal

Definition at line 126 of file sys_tst_sram_s3.vhd.

◆ RB_SRES

RB_SRES rb_sres_type := rb_sres_init
Signal

Definition at line 127 of file sys_tst_sram_s3.vhd.

◆ RB_LAM

RB_LAM slv16 := ( others = > ' 0 ' )
Signal

Definition at line 128 of file sys_tst_sram_s3.vhd.

◆ RB_STAT

RB_STAT slv4 := ( others = > ' 0 ' )
Signal

Definition at line 129 of file sys_tst_sram_s3.vhd.

◆ SER_MONI

SER_MONI serport_moni_type := serport_moni_init
Signal

Definition at line 131 of file sys_tst_sram_s3.vhd.

◆ RB_SRES_TST

RB_SRES_TST rb_sres_type := rb_sres_init
Signal

Definition at line 133 of file sys_tst_sram_s3.vhd.

◆ RB_LAM_TST

RB_LAM_TST slbit := ' 0 '
Signal

Definition at line 134 of file sys_tst_sram_s3.vhd.

◆ MEM_RESET

MEM_RESET slbit := ' 0 '
Signal

Definition at line 136 of file sys_tst_sram_s3.vhd.

◆ MEM_REQ

MEM_REQ slbit := ' 0 '
Signal

Definition at line 137 of file sys_tst_sram_s3.vhd.

◆ MEM_WE

MEM_WE slbit := ' 0 '
Signal

Definition at line 138 of file sys_tst_sram_s3.vhd.

◆ MEM_BUSY

MEM_BUSY slbit := ' 0 '
Signal

Definition at line 139 of file sys_tst_sram_s3.vhd.

◆ MEM_ACK_R

MEM_ACK_R slbit := ' 0 '
Signal

Definition at line 140 of file sys_tst_sram_s3.vhd.

◆ MEM_ACK_W

MEM_ACK_W slbit := ' 0 '
Signal

Definition at line 141 of file sys_tst_sram_s3.vhd.

◆ MEM_ACT_R

MEM_ACT_R slbit := ' 0 '
Signal

Definition at line 142 of file sys_tst_sram_s3.vhd.

◆ MEM_ACT_W

MEM_ACT_W slbit := ' 0 '
Signal

Definition at line 143 of file sys_tst_sram_s3.vhd.

◆ MEM_ADDR

MEM_ADDR slv18 := ( others = > ' 0 ' )
Signal

Definition at line 144 of file sys_tst_sram_s3.vhd.

◆ MEM_BE

MEM_BE slv4 := ( others = > ' 0 ' )
Signal

Definition at line 145 of file sys_tst_sram_s3.vhd.

◆ MEM_DI

MEM_DI slv32 := ( others = > ' 0 ' )
Signal

Definition at line 146 of file sys_tst_sram_s3.vhd.

◆ MEM_DO

MEM_DO slv32 := ( others = > ' 0 ' )
Signal

Definition at line 147 of file sys_tst_sram_s3.vhd.

◆ sysid_proj

sysid_proj slv16 := x " 0104 "
Constant

Definition at line 149 of file sys_tst_sram_s3.vhd.

◆ sysid_board

sysid_board slv8 := x " 01 "
Constant

Definition at line 150 of file sys_tst_sram_s3.vhd.

◆ sysid_vers

sysid_vers slv8 := x " 00 "
Constant

Definition at line 151 of file sys_tst_sram_s3.vhd.

◆ clkdiv

clkdiv clkdivce
Instantiation

Definition at line 166 of file sys_tst_sram_s3.vhd.

◆ iob_rs232

iob_rs232 bp_rs232_2line_iob
Instantiation

Definition at line 175 of file sys_tst_sram_s3.vhd.

◆ hio

hio sn_humanio
Instantiation

Definition at line 192 of file sys_tst_sram_s3.vhd.

◆ rlink

rlink rlink_sp1c
Instantiation

Definition at line 225 of file sys_tst_sram_s3.vhd.

◆ tst

tst tst_sram
Instantiation

Definition at line 254 of file sys_tst_sram_s3.vhd.

◆ sramctl

sramctl s3_sram_memctl
Instantiation

Definition at line 277 of file sys_tst_sram_s3.vhd.

The documentation for this design unit was generated from the following file: