w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Instantiations | Processes | Records | Signals | Subtypes
syn Architecture Reference
Architecture >> syn

Processes

proc_regs  ( CLK )
proc_next  ( R_REGS , REQ , ADDR , BE , DI , WE , REQ_SIZE , RES_VAL , RES_DO , APP_RDY_CLK , APP_WDF_RDY_CLK , MIGUIRST_CLK , MIGCACO_CLK )
proc_req2app  ( APP_RDY , APP_WDF_RDY , REQ_VAL , REQ_DO , INIT_CALIB_COMPLETE )
proc_app2res  ( APP_RD_DATA_VALID , APP_RD_DATA )

Constants

mwidth  positive := 2 ** BAWIDTH
dwidth  positive := 8 * mwidth
tawidth  positive := 20 - ( BAWIDTH - 2 )
rfwidth  positive := dwidth + mwidth + tawidth + 1
rf_f_we  integer := 0
ngrp  positive := 2 ** ( BAWIDTH - 2 )
bufzero  slv ( dwidth - 1 downto 0 ) := ( others = > ' 0 ' )
tagzero  slv ( tawidth - 1 downto 0 ) := ( others = > ' 0 ' )
pendzero  slv ( mwidth - 1 downto 0 ) := ( others = > ' 0 ' )
regs_init  regs_type := ( ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , bufzero , tagzero , ' 0 ' , ' 0 ' , ' 0 ' , bufzero , tagzero , pendzero )

Subtypes

sa_f_ta  integer range 20 - 1 downto BAWIDTH - 2
sa_f_ga  integer range BAWIDTH - 3 downto 0
ma_f_ta  integer range 22 - 1 downto BAWIDTH
rf_f_data  integer range dwidth + mwidth + tawidth downto MWIDTH+ tawidth + 1
rf_f_mask  integer range mwidth + tawidth downto tawidth + 1
rf_f_addr  integer range tawidth downto 1

Signals

R_REGS  regs_type := regs_init
N_REGS  regs_type
REQ_DI  slv ( rfwidth - 1 downto 0 ) := ( others = > ' 0 ' )
REQ_DO  slv ( rfwidth - 1 downto 0 ) := ( others = > ' 0 ' )
REQ_ENA  slbit := ' 0 '
REQ_VAL  slbit := ' 0 '
REQ_HOLD  slbit := ' 0 '
REQ_SIZE  slv4 := ( others = > ' 0 ' )
RES_DI  slv ( dwidth - 1 downto 0 ) := ( others = > ' 0 ' )
RES_DO  slv ( dwidth - 1 downto 0 ) := ( others = > ' 0 ' )
RES_ENA  slbit := ' 0 '
RES_VAL  slbit := ' 0 '
APP_RDY_CLK  slbit := ' 0 '
APP_WDF_RDY_CLK  slbit := ' 0 '
MIGUIRST_CLK  slbit := ' 0 '
MIGCACO_CLK  slbit := ' 0 '

Records

regs_type 
actr slbit
actw slbit
ackr slbit
req_addr slv20
req_be slv4
req_di slv32
res_do slv32
rdbuf slv ( dwidth - 1 downto 0 )
rdtag slv ( tawidth - 1 downto 0 )
rdval slbit
rdnew slbit
rdpend slbit
wrbuf slv ( dwidth - 1 downto 0 )
wrtag slv ( tawidth - 1 downto 0 )
wrpend slv ( mwidth - 1 downto 0 )

Instantiations

reqfifo  fifo_2c_dram2 <Entity fifo_2c_dram2>
resfifo  fifo_2c_dram2 <Entity fifo_2c_dram2>
cdc_crdy  cdc_signal_s1 <Entity cdc_signal_s1>
cdc_wrdy  cdc_signal_s1 <Entity cdc_signal_s1>
cdc_uirst  cdc_signal_s1 <Entity cdc_signal_s1>
cdc_caco  cdc_signal_s1 <Entity cdc_signal_s1>

Detailed Description

Definition at line 69 of file sramif2migui_core.vhd.

Member Function/Procedure/Process Documentation

◆ proc_regs()

proc_regs (   CLK)

Definition at line 217 of file sramif2migui_core.vhd.

◆ proc_next()

proc_next (   R_REGS ,
  REQ ,
  ADDR ,
  BE ,
  DI ,
  WE ,
  REQ_SIZE ,
  RES_VAL ,
  RES_DO ,
  APP_RDY_CLK ,
  APP_WDF_RDY_CLK ,
  MIGUIRST_CLK ,
  MIGCACO_CLK  
)
Process

Definition at line 230 of file sramif2migui_core.vhd.

◆ proc_req2app()

proc_req2app (   APP_RDY ,
  APP_WDF_RDY ,
  REQ_VAL ,
  REQ_DO ,
  INIT_CALIB_COMPLETE  
)
Process

Definition at line 377 of file sramif2migui_core.vhd.

◆ proc_app2res()

proc_app2res (   APP_RD_DATA_VALID ,
  APP_RD_DATA  
)
Process

Definition at line 408 of file sramif2migui_core.vhd.

Member Data Documentation

◆ mwidth

mwidth positive := 2 ** BAWIDTH
Constant

Definition at line 71 of file sramif2migui_core.vhd.

◆ dwidth

dwidth positive := 8 * mwidth
Constant

Definition at line 72 of file sramif2migui_core.vhd.

◆ tawidth

tawidth positive := 20 - ( BAWIDTH - 2 )
Constant

Definition at line 73 of file sramif2migui_core.vhd.

◆ rfwidth

rfwidth positive := dwidth + mwidth + tawidth + 1
Constant

Definition at line 74 of file sramif2migui_core.vhd.

◆ sa_f_ta

sa_f_ta integer range 20 - 1 downto BAWIDTH - 2
Subtype

Definition at line 77 of file sramif2migui_core.vhd.

◆ sa_f_ga

sa_f_ga integer range BAWIDTH - 3 downto 0
Subtype

Definition at line 78 of file sramif2migui_core.vhd.

◆ ma_f_ta

ma_f_ta integer range 22 - 1 downto BAWIDTH
Subtype

Definition at line 80 of file sramif2migui_core.vhd.

◆ rf_f_data

rf_f_data integer range dwidth + mwidth + tawidth downto MWIDTH+ tawidth + 1
Subtype

Definition at line 84 of file sramif2migui_core.vhd.

◆ rf_f_mask

rf_f_mask integer range mwidth + tawidth downto tawidth + 1
Subtype

Definition at line 85 of file sramif2migui_core.vhd.

◆ rf_f_addr

rf_f_addr integer range tawidth downto 1
Subtype

Definition at line 86 of file sramif2migui_core.vhd.

◆ rf_f_we

rf_f_we integer := 0
Constant

Definition at line 87 of file sramif2migui_core.vhd.

◆ ngrp

ngrp positive := 2 ** ( BAWIDTH - 2 )
Constant

Definition at line 89 of file sramif2migui_core.vhd.

◆ regs_type

regs_type
Record

Definition at line 91 of file sramif2migui_core.vhd.

◆ actr

actr slbit
Record

Definition at line 92 of file sramif2migui_core.vhd.

◆ actw

actw slbit
Record

Definition at line 93 of file sramif2migui_core.vhd.

◆ ackr

ackr slbit
Record

Definition at line 94 of file sramif2migui_core.vhd.

◆ req_addr

req_addr slv20
Record

Definition at line 95 of file sramif2migui_core.vhd.

◆ req_be

req_be slv4
Record

Definition at line 96 of file sramif2migui_core.vhd.

◆ req_di

req_di slv32
Record

Definition at line 97 of file sramif2migui_core.vhd.

◆ res_do

res_do slv32
Record

Definition at line 98 of file sramif2migui_core.vhd.

◆ rdbuf

rdbuf slv ( dwidth - 1 downto 0 )
Record

Definition at line 99 of file sramif2migui_core.vhd.

◆ rdtag

rdtag slv ( tawidth - 1 downto 0 )
Record

Definition at line 100 of file sramif2migui_core.vhd.

◆ rdval

rdval slbit
Record

Definition at line 101 of file sramif2migui_core.vhd.

◆ rdnew

rdnew slbit
Record

Definition at line 102 of file sramif2migui_core.vhd.

◆ rdpend

rdpend slbit
Record

Definition at line 103 of file sramif2migui_core.vhd.

◆ wrbuf

wrbuf slv ( dwidth - 1 downto 0 )
Record

Definition at line 104 of file sramif2migui_core.vhd.

◆ wrtag

wrtag slv ( tawidth - 1 downto 0 )
Record

Definition at line 105 of file sramif2migui_core.vhd.

◆ wrpend

wrpend slv ( mwidth - 1 downto 0 )
Record

Definition at line 106 of file sramif2migui_core.vhd.

◆ bufzero

bufzero slv ( dwidth - 1 downto 0 ) := ( others = > ' 0 ' )
Constant

Definition at line 109 of file sramif2migui_core.vhd.

◆ tagzero

tagzero slv ( tawidth - 1 downto 0 ) := ( others = > ' 0 ' )
Constant

Definition at line 110 of file sramif2migui_core.vhd.

◆ pendzero

pendzero slv ( mwidth - 1 downto 0 ) := ( others = > ' 0 ' )
Constant

Definition at line 111 of file sramif2migui_core.vhd.

◆ regs_init

regs_init regs_type := ( ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , bufzero , tagzero , ' 0 ' , ' 0 ' , ' 0 ' , bufzero , tagzero , pendzero )
Constant

Definition at line 113 of file sramif2migui_core.vhd.

◆ R_REGS

R_REGS regs_type := regs_init
Signal

Definition at line 127 of file sramif2migui_core.vhd.

◆ N_REGS

N_REGS regs_type
Signal

Definition at line 128 of file sramif2migui_core.vhd.

◆ REQ_DI

REQ_DI slv ( rfwidth - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 130 of file sramif2migui_core.vhd.

◆ REQ_DO

REQ_DO slv ( rfwidth - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 131 of file sramif2migui_core.vhd.

◆ REQ_ENA

REQ_ENA slbit := ' 0 '
Signal

Definition at line 132 of file sramif2migui_core.vhd.

◆ REQ_VAL

REQ_VAL slbit := ' 0 '
Signal

Definition at line 133 of file sramif2migui_core.vhd.

◆ REQ_HOLD

REQ_HOLD slbit := ' 0 '
Signal

Definition at line 134 of file sramif2migui_core.vhd.

◆ REQ_SIZE

REQ_SIZE slv4 := ( others = > ' 0 ' )
Signal

Definition at line 135 of file sramif2migui_core.vhd.

◆ RES_DI

RES_DI slv ( dwidth - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 137 of file sramif2migui_core.vhd.

◆ RES_DO

RES_DO slv ( dwidth - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 138 of file sramif2migui_core.vhd.

◆ RES_ENA

RES_ENA slbit := ' 0 '
Signal

Definition at line 139 of file sramif2migui_core.vhd.

◆ RES_VAL

RES_VAL slbit := ' 0 '
Signal

Definition at line 140 of file sramif2migui_core.vhd.

◆ APP_RDY_CLK

APP_RDY_CLK slbit := ' 0 '
Signal

Definition at line 142 of file sramif2migui_core.vhd.

◆ APP_WDF_RDY_CLK

APP_WDF_RDY_CLK slbit := ' 0 '
Signal

Definition at line 143 of file sramif2migui_core.vhd.

◆ MIGUIRST_CLK

MIGUIRST_CLK slbit := ' 0 '
Signal

Definition at line 144 of file sramif2migui_core.vhd.

◆ MIGCACO_CLK

MIGCACO_CLK slbit := ' 0 '
Signal

Definition at line 145 of file sramif2migui_core.vhd.

◆ reqfifo

reqfifo fifo_2c_dram2
Instantiation

Definition at line 170 of file sramif2migui_core.vhd.

◆ resfifo

resfifo fifo_2c_dram2
Instantiation

Definition at line 189 of file sramif2migui_core.vhd.

◆ cdc_crdy

cdc_crdy cdc_signal_s1
Instantiation

Definition at line 197 of file sramif2migui_core.vhd.

◆ cdc_wrdy

cdc_wrdy cdc_signal_s1
Instantiation

Definition at line 203 of file sramif2migui_core.vhd.

◆ cdc_uirst

cdc_uirst cdc_signal_s1
Instantiation

Definition at line 209 of file sramif2migui_core.vhd.

◆ cdc_caco

cdc_caco cdc_signal_s1
Instantiation

Definition at line 215 of file sramif2migui_core.vhd.

The documentation for this design unit was generated from the following file: