w11 - vhd 0.794
W11 CPU core and support modules
Loading...
Searching...
No Matches
sim Architecture Reference
Architecture >> sim

Processes

proc_regs  ( CLK )
proc_next  ( R_REGS , ENAXON , ENAESC , UART_RXDATA , UART_RXVAL , RXHOLD )

Constants

regs_init  regs_type := ( ' 1 ' , ' 0 ' , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' )

Signals

R_REGS  regs_type := regs_init
N_REGS  regs_type := regs_init

Records

regs_type 
txok slbit
escseen slbit
rxdata slv8
rxval slbit
rxovr slbit

Detailed Description

Definition at line 42 of file serport_xonrx_tb.vhd.

Member Function/Procedure/Process Documentation

◆ proc_regs()

proc_regs (   CLK  
)
Process

Definition at line 64 of file serport_xonrx_tb.vhd.

◆ proc_next()

proc_next (   R_REGS ,
  ENAXON ,
  ENAESC ,
  UART_RXDATA ,
  UART_RXVAL ,
  RXHOLD  
)
Process

Definition at line 77 of file serport_xonrx_tb.vhd.

Member Data Documentation

◆ regs_type

regs_type
Record

Definition at line 44 of file serport_xonrx_tb.vhd.

◆ txok

txok slbit
Record

Definition at line 45 of file serport_xonrx_tb.vhd.

◆ escseen

escseen slbit
Record

Definition at line 46 of file serport_xonrx_tb.vhd.

◆ rxdata

rxdata slv8
Record

Definition at line 47 of file serport_xonrx_tb.vhd.

◆ rxval

rxval slbit
Record

Definition at line 48 of file serport_xonrx_tb.vhd.

◆ rxovr

rxovr slbit
Record

Definition at line 49 of file serport_xonrx_tb.vhd.

◆ regs_init

regs_init regs_type := ( ' 1 ' , ' 0 ' , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' )
Constant

Definition at line 52 of file serport_xonrx_tb.vhd.

◆ R_REGS

Definition at line 59 of file serport_xonrx_tb.vhd.

◆ N_REGS

Definition at line 60 of file serport_xonrx_tb.vhd.


The documentation for this design unit was generated from the following file: