syn Architecture Reference

Architecture >> syn

Processes
proc_regs	( CLK )
proc_next	( R_REGS , ENAXON , ENAESC , UART_RXDATA , UART_RXVAL , RXHOLD )

Constants
regs_init	regs_type := ( ' 1 ' , ' 0 ' , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' )

Signals
R_REGS	regs_type := regs_init
N_REGS	regs_type := regs_init

Records
regs_type
txok	slbit
escseen	slbit
rxdata	slv8
rxval	slbit
rxovr	slbit

Detailed Description

Definition at line 45 of file serport_xonrx.vhd.

Member Function/Procedure/Process Documentation

proc_regs()

proc_regs (   CLK   )

Process

Definition at line 67 of file serport_xonrx.vhd.

proc_next()

proc_next (   R_REGS ,   ENAXON ,   ENAESC ,   UART_RXDATA ,   UART_RXVAL ,   RXHOLD   )

Process

Definition at line 80 of file serport_xonrx.vhd.

Member Data Documentation

regs_type

regs_type

Record

Definition at line 47 of file serport_xonrx.vhd.

txok

txok slbit

Record

Definition at line 48 of file serport_xonrx.vhd.

escseen

escseen slbit

Record

Definition at line 49 of file serport_xonrx.vhd.

rxdata

rxdata slv8

Record

Definition at line 50 of file serport_xonrx.vhd.

rxval

rxval slbit

Record

Definition at line 51 of file serport_xonrx.vhd.

rxovr

rxovr slbit

Record

Definition at line 52 of file serport_xonrx.vhd.

regs_init

regs_init regs_type := ( ' 1 ' , ' 0 ' , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' )

Constant

Definition at line 55 of file serport_xonrx.vhd.

R_REGS

R_REGS regs_type := regs_init

Signal

Definition at line 62 of file serport_xonrx.vhd.

N_REGS

N_REGS regs_type := regs_init

Signal

Definition at line 63 of file serport_xonrx.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/serport/serport_xonrx.vhd