syn Architecture Reference

Architecture >> syn

Signals
CLKDIV	slv ( CDWIDTH - 1 downto 0 ) := slv ( to_unsigned ( 0 , CDWIDTH ) )
CLKDIV_F	slv3 := ( others = > ' 0 ' )
ABACT_L	slbit := ' 0 '
UART_RESET	slbit := ' 0 '

Instantiations
ab	serport_uart_autobaud <Entity serport_uart_autobaud>
rxtx	serport_uart_rxtx <Entity serport_uart_rxtx>

Detailed Description

Definition at line 62 of file serport_uart_rxtx_ab.vhd.

Member Data Documentation

CLKDIV

CLKDIV slv ( CDWIDTH - 1 downto 0 ) := slv ( to_unsigned ( 0 , CDWIDTH ) )

Signal

Definition at line 64 of file serport_uart_rxtx_ab.vhd.

CLKDIV_F

CLKDIV_F slv3 := ( others = > ' 0 ' )

Signal

Definition at line 65 of file serport_uart_rxtx_ab.vhd.

ABACT_L

ABACT_L slbit := ' 0 '

Signal

Definition at line 66 of file serport_uart_rxtx_ab.vhd.

UART_RESET

UART_RESET slbit := ' 0 '

Signal

Definition at line 67 of file serport_uart_rxtx_ab.vhd.

ab

ab serport_uart_autobaud

Instantiation

Definition at line 84 of file serport_uart_rxtx_ab.vhd.

rxtx

rxtx serport_uart_rxtx

Instantiation

Definition at line 107 of file serport_uart_rxtx_ab.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/serport/serport_uart_rxtx_ab.vhd