syn Architecture Reference

Architecture >> syn

Processes
proc_regs	( CLK )
proc_mux	( R_DIM , R_COL , R_LED , DATR , DATG , DATB )

Signals
R_LED	slv4 := " 0001 "
R_COL	slv3 := " 001 "
R_DIM	slbit := ' 1 '
RGB0	slv3 := ( others = > ' 0 ' )
RGB1	slv3 := ( others = > ' 0 ' )

Instantiations
iob_rgb0	iob_reg_o_gen <Entity iob_reg_o_gen>
iob_rgb1	iob_reg_o_gen <Entity iob_reg_o_gen>

Detailed Description

Definition at line 40 of file rgbdrv_3x2mux.vhd.

Member Function/Procedure/Process Documentation

proc_regs()

proc_regs

(

CLK

)

Definition at line 58 of file rgbdrv_3x2mux.vhd.

proc_mux()

proc_mux (   R_DIM ,   R_COL ,   R_LED ,   DATR ,   DATG ,   DATB   )

Process

Definition at line 81 of file rgbdrv_3x2mux.vhd.

Member Data Documentation

R_LED

R_LED slv4 := " 0001 "

Signal

Definition at line 42 of file rgbdrv_3x2mux.vhd.

R_COL

R_COL slv3 := " 001 "

Signal

Definition at line 43 of file rgbdrv_3x2mux.vhd.

R_DIM

R_DIM slbit := ' 1 '

Signal

Definition at line 44 of file rgbdrv_3x2mux.vhd.

RGB0

RGB0 slv3 := ( others = > ' 0 ' )

Signal

Definition at line 46 of file rgbdrv_3x2mux.vhd.

RGB1

RGB1 slv3 := ( others = > ' 0 ' )

Signal

Definition at line 47 of file rgbdrv_3x2mux.vhd.

iob_rgb0

iob_rgb0 iob_reg_o_gen

Instantiation

Definition at line 53 of file rgbdrv_3x2mux.vhd.

iob_rgb1

iob_rgb1 iob_reg_o_gen

Instantiation

Definition at line 56 of file rgbdrv_3x2mux.vhd.

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The documentation for this design unit was generated from the following file:

• bplib/bpgen/rgbdrv_3x2mux.vhd