w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Instantiations | Processes | Records | Signals | Subtypes | Types
syn Architecture Reference
Architecture >> syn

Processes

proc_regs  ( CLK )
proc_next  ( R_REGS , RB_MREQ , RXSD , RXACT , BRAM_DOA )

Constants

rbaddr_cntl  slv2 := " 00 "
rbaddr_rdiv  slv2 := " 01 "
rbaddr_addr  slv2 := " 10 "
rbaddr_data  slv2 := " 11 "
cntl_rbf_ena01  integer := 3
cntl_rbf_ena10  integer := 2
cntl_rbf_clr  integer := 1
cntl_rbf_go  integer := 0
addr_rbf_waddr  integer := 0
regs_init  regs_type := ( s_idle , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , ' 0 ' , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) )

Types

state_type  ( s_idle , s_char , s_clr )

Subtypes

addr_rbf_laddr  integer range 9 downto 1

Signals

R_REGS  regs_type := regs_init
N_REGS  regs_type
BRAM_ENA  slbit := ' 0 '
BRAM_DIA  slv32 := ( others = > ' 0 ' )
BRAM_DIB  slv32 := ( others = > ' 0 ' )
BRAM_DOA  slv32 := ( others = > ' 0 ' )

Records

regs_type 
state state_type
rbsel slbit
go slbit
clr slbit
ena10 slbit
ena01 slbit
rdiv slv8
laddr slv9
waddr slbit
laddr_1 slv9
rxsd_1 slbit
memwe slbit
memclr slbit
rdivcnt slv8

Instantiations

bram  ram_2swsr_wfirst_gen <Entity ram_2swsr_wfirst_gen>

Detailed Description

Definition at line 75 of file rbd_eyemon.vhd.

Member Function/Procedure/Process Documentation

◆ proc_regs()

proc_regs (   CLK)

Definition at line 156 of file rbd_eyemon.vhd.

◆ proc_next()

proc_next (   R_REGS ,
  RB_MREQ ,
  RXSD ,
  RXACT ,
  BRAM_DOA  
)
Process

Definition at line 167 of file rbd_eyemon.vhd.

Member Data Documentation

◆ rbaddr_cntl

rbaddr_cntl slv2 := " 00 "
Constant

Definition at line 77 of file rbd_eyemon.vhd.

◆ rbaddr_rdiv

rbaddr_rdiv slv2 := " 01 "
Constant

Definition at line 78 of file rbd_eyemon.vhd.

◆ rbaddr_addr

rbaddr_addr slv2 := " 10 "
Constant

Definition at line 79 of file rbd_eyemon.vhd.

◆ rbaddr_data

rbaddr_data slv2 := " 11 "
Constant

Definition at line 80 of file rbd_eyemon.vhd.

◆ cntl_rbf_ena01

cntl_rbf_ena01 integer := 3
Constant

Definition at line 82 of file rbd_eyemon.vhd.

◆ cntl_rbf_ena10

cntl_rbf_ena10 integer := 2
Constant

Definition at line 83 of file rbd_eyemon.vhd.

◆ cntl_rbf_clr

cntl_rbf_clr integer := 1
Constant

Definition at line 84 of file rbd_eyemon.vhd.

◆ cntl_rbf_go

cntl_rbf_go integer := 0
Constant

Definition at line 85 of file rbd_eyemon.vhd.

◆ addr_rbf_laddr

addr_rbf_laddr integer range 9 downto 1
Subtype

Definition at line 86 of file rbd_eyemon.vhd.

◆ addr_rbf_waddr

addr_rbf_waddr integer := 0
Constant

Definition at line 87 of file rbd_eyemon.vhd.

◆ state_type

state_type ( s_idle , s_char , s_clr )
Type

Definition at line 89 of file rbd_eyemon.vhd.

◆ regs_type

regs_type
Record

Definition at line 95 of file rbd_eyemon.vhd.

◆ state

state state_type
Record

Definition at line 96 of file rbd_eyemon.vhd.

◆ rbsel

rbsel slbit
Record

Definition at line 97 of file rbd_eyemon.vhd.

◆ go

go slbit
Record

Definition at line 98 of file rbd_eyemon.vhd.

◆ clr

clr slbit
Record

Definition at line 99 of file rbd_eyemon.vhd.

◆ ena10

ena10 slbit
Record

Definition at line 100 of file rbd_eyemon.vhd.

◆ ena01

ena01 slbit
Record

Definition at line 101 of file rbd_eyemon.vhd.

◆ rdiv

rdiv slv8
Record

Definition at line 102 of file rbd_eyemon.vhd.

◆ laddr

laddr slv9
Record

Definition at line 103 of file rbd_eyemon.vhd.

◆ waddr

waddr slbit
Record

Definition at line 104 of file rbd_eyemon.vhd.

◆ laddr_1

laddr_1 slv9
Record

Definition at line 105 of file rbd_eyemon.vhd.

◆ rxsd_1

rxsd_1 slbit
Record

Definition at line 106 of file rbd_eyemon.vhd.

◆ memwe

memwe slbit
Record

Definition at line 107 of file rbd_eyemon.vhd.

◆ memclr

memclr slbit
Record

Definition at line 108 of file rbd_eyemon.vhd.

◆ rdivcnt

rdivcnt slv8
Record

Definition at line 109 of file rbd_eyemon.vhd.

◆ regs_init

regs_init regs_type := ( s_idle , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) , ' 0 ' , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) )
Constant

Definition at line 112 of file rbd_eyemon.vhd.

◆ R_REGS

R_REGS regs_type := regs_init
Signal

Definition at line 125 of file rbd_eyemon.vhd.

◆ N_REGS

N_REGS regs_type
Signal

Definition at line 126 of file rbd_eyemon.vhd.

◆ BRAM_ENA

BRAM_ENA slbit := ' 0 '
Signal

Definition at line 128 of file rbd_eyemon.vhd.

◆ BRAM_DIA

BRAM_DIA slv32 := ( others = > ' 0 ' )
Signal

Definition at line 129 of file rbd_eyemon.vhd.

◆ BRAM_DIB

BRAM_DIB slv32 := ( others = > ' 0 ' )
Signal

Definition at line 130 of file rbd_eyemon.vhd.

◆ BRAM_DOA

BRAM_DOA slv32 := ( others = > ' 0 ' )
Signal

Definition at line 131 of file rbd_eyemon.vhd.

◆ bram

bram ram_2swsr_wfirst_gen
Instantiation

Definition at line 154 of file rbd_eyemon.vhd.

The documentation for this design unit was generated from the following file: