syn Architecture Reference

Architecture >> syn

Processes
proc_pc	( CLK )

Procedures
	do_regmap( signal PRNUM: in slv3 signal PMODE: in slv2 signal PRSET: in slbit signal PADDR: out slv4 )

Signals
MASRC	slv4 := ( others = > ' 0 ' )
MADST	slv4 := ( others = > ' 0 ' )
WE1	slbit := ' 0 '
MEMSRC	slv16 := ( others = > ' 0 ' )
MEMDST	slv16 := ( others = > ' 0 ' )
R_PC	slv16 := ( others = > ' 0 ' )

Instantiations
gr_low	ram_1swar_1ar_gen <Entity ram_1swar_1ar_gen>
gr_high	ram_1swar_1ar_gen <Entity ram_1swar_1ar_gen>

Detailed Description

Definition at line 53 of file pdp11_gr.vhd.

Member Function/Procedure/Process Documentation

do_regmap()

do_regmap ( signal   PRNUM in slv3 , signal   PMODE in slv2 , signal   PRSET in slbit , signal   PADDR out slv4   )

Procedure

Definition at line 76 of file pdp11_gr.vhd.

proc_pc()

proc_pc

(

CLK

)

Definition at line 134 of file pdp11_gr.vhd.

Member Data Documentation

MASRC

MASRC slv4 := ( others = > ' 0 ' )

Signal

Definition at line 94 of file pdp11_gr.vhd.

MADST

MADST slv4 := ( others = > ' 0 ' )

Signal

Definition at line 95 of file pdp11_gr.vhd.

WE1

WE1 slbit := ' 0 '

Signal

Definition at line 96 of file pdp11_gr.vhd.

MEMSRC

MEMSRC slv16 := ( others = > ' 0 ' )

Signal

Definition at line 97 of file pdp11_gr.vhd.

MEMDST

MEMDST slv16 := ( others = > ' 0 ' )

Signal

Definition at line 98 of file pdp11_gr.vhd.

R_PC

R_PC slv16 := ( others = > ' 0 ' )

Signal

Definition at line 99 of file pdp11_gr.vhd.

gr_low

gr_low ram_1swar_1ar_gen

Instantiation

Definition at line 119 of file pdp11_gr.vhd.

gr_high

gr_high ram_1swar_1ar_gen

Instantiation

Definition at line 132 of file pdp11_gr.vhd.

---

The documentation for this design unit was generated from the following file:

• w11a/pdp11_gr.vhd