w11 - vhd 0.794
W11 CPU core and support modules
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syn Architecture Reference
Architecture >> syn

Constants

conf_intmap  intmap_array_type := ( intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , ( 8#100# , 6 ) , ( 8#220# , 5 ) , ( 8#060# , 4 ) , ( 8#064# , 4 ) , intmap_init )

Signals

RB_LAM_DL11  slbit := ' 0 '
RB_LAM_RK11  slbit := ' 0 '
IB_SRES_SDREG  ib_sres_type := ib_sres_init
IB_SRES_KW11L  ib_sres_type := ib_sres_init
IB_SRES_DL11  ib_sres_type := ib_sres_init
IB_SRES_RK11  ib_sres_type := ib_sres_init
EI_REQ  slv16_1 := ( others = > ' 0 ' )
EI_ACK  slv16_1 := ( others = > ' 0 ' )
EI_REQ_KW11L  slbit := ' 0 '
EI_REQ_DL11RX  slbit := ' 0 '
EI_REQ_DL11TX  slbit := ' 0 '
EI_REQ_RK11  slbit := ' 0 '
EI_ACK_KW11L  slbit := ' 0 '
EI_ACK_DL11RX  slbit := ' 0 '
EI_ACK_DL11TX  slbit := ' 0 '
EI_ACK_RK11  slbit := ' 0 '
RLIM_CEV  slv8 := ( others = > ' 0 ' )

Instantiations

rlim  ib_rlim_gen <Entity ib_rlim_gen>
sdreg  ibdr_sdreg <Entity ibdr_sdreg>
kw11l  ibd_kw11l <Entity ibd_kw11l>
dl11  ibdr_dl11 <Entity ibdr_dl11>
rk11  ibdr_rk11 <Entity ibdr_rk11>
sres_or  ib_sres_or_4 <Entity ib_sres_or_4>
intmap  ib_intmap <Entity ib_intmap>

Detailed Description

Definition at line 81 of file ibdr_minisys.vhd.

Member Data Documentation

◆ conf_intmap

conf_intmap intmap_array_type := ( intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , intmap_init , ( 8#100# , 6 ) , ( 8#220# , 5 ) , ( 8#060# , 4 ) , ( 8#064# , 4 ) , intmap_init )
Constant

Definition at line 83 of file ibdr_minisys.vhd.

◆ RB_LAM_DL11

RB_LAM_DL11 slbit := ' 0 '
Signal

Definition at line 102 of file ibdr_minisys.vhd.

◆ RB_LAM_RK11

RB_LAM_RK11 slbit := ' 0 '
Signal

Definition at line 103 of file ibdr_minisys.vhd.

◆ IB_SRES_SDREG

IB_SRES_SDREG ib_sres_type := ib_sres_init
Signal

Definition at line 105 of file ibdr_minisys.vhd.

◆ IB_SRES_KW11L

IB_SRES_KW11L ib_sres_type := ib_sres_init
Signal

Definition at line 106 of file ibdr_minisys.vhd.

◆ IB_SRES_DL11

IB_SRES_DL11 ib_sres_type := ib_sres_init
Signal

Definition at line 107 of file ibdr_minisys.vhd.

◆ IB_SRES_RK11

IB_SRES_RK11 ib_sres_type := ib_sres_init
Signal

Definition at line 108 of file ibdr_minisys.vhd.

◆ EI_REQ

EI_REQ slv16_1 := ( others = > ' 0 ' )
Signal

Definition at line 110 of file ibdr_minisys.vhd.

◆ EI_ACK

EI_ACK slv16_1 := ( others = > ' 0 ' )
Signal

Definition at line 111 of file ibdr_minisys.vhd.

◆ EI_REQ_KW11L

EI_REQ_KW11L slbit := ' 0 '
Signal

Definition at line 113 of file ibdr_minisys.vhd.

◆ EI_REQ_DL11RX

EI_REQ_DL11RX slbit := ' 0 '
Signal

Definition at line 114 of file ibdr_minisys.vhd.

◆ EI_REQ_DL11TX

EI_REQ_DL11TX slbit := ' 0 '
Signal

Definition at line 115 of file ibdr_minisys.vhd.

◆ EI_REQ_RK11

EI_REQ_RK11 slbit := ' 0 '
Signal

Definition at line 116 of file ibdr_minisys.vhd.

◆ EI_ACK_KW11L

EI_ACK_KW11L slbit := ' 0 '
Signal

Definition at line 118 of file ibdr_minisys.vhd.

◆ EI_ACK_DL11RX

EI_ACK_DL11RX slbit := ' 0 '
Signal

Definition at line 119 of file ibdr_minisys.vhd.

◆ EI_ACK_DL11TX

EI_ACK_DL11TX slbit := ' 0 '
Signal

Definition at line 120 of file ibdr_minisys.vhd.

◆ EI_ACK_RK11

EI_ACK_RK11 slbit := ' 0 '
Signal

Definition at line 121 of file ibdr_minisys.vhd.

◆ RLIM_CEV

RLIM_CEV slv8 := ( others = > ' 0 ' )
Signal

Definition at line 123 of file ibdr_minisys.vhd.

◆ rlim

rlim ib_rlim_gen
Instantiation

Definition at line 134 of file ibdr_minisys.vhd.

◆ sdreg

sdreg ibdr_sdreg
Instantiation

Definition at line 143 of file ibdr_minisys.vhd.

◆ kw11l

kw11l ibd_kw11l
Instantiation

Definition at line 156 of file ibdr_minisys.vhd.

◆ dl11

dl11 ibdr_dl11
Instantiation

Definition at line 171 of file ibdr_minisys.vhd.

◆ rk11

rk11 ibdr_rk11
Instantiation

Definition at line 183 of file ibdr_minisys.vhd.

◆ sres_or

sres_or ib_sres_or_4
Instantiation

Definition at line 192 of file ibdr_minisys.vhd.

◆ intmap

intmap ib_intmap
Instantiation

Definition at line 204 of file ibdr_minisys.vhd.


The documentation for this design unit was generated from the following file: