w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Processes | Records | Signals | Subtypes
syn Architecture Reference
Architecture >> syn

Processes

proc_regs  ( CLK )
proc_next  ( R_REGS , IB_MREQ , BRESET )

Constants

ibaddr_deuna  slv16 := slv ( to_unsigned ( 8#174510# , 16 ) )
ibaddr_pr0  slv2 := " 00 "
ibaddr_pr1  slv2 := " 01 "
ibaddr_pr2  slv2 := " 10 "
ibaddr_pr3  slv2 := " 11 "
pr0_ibf_seri  integer := 15
pr0_ibf_pcei  integer := 14
pr0_ibf_rxi  integer := 13
pr0_ibf_txi  integer := 12
pr0_ibf_dni  integer := 11
pr0_ibf_rcbi  integer := 10
pr0_ibf_usci  integer := 8
pr0_ibf_intr  integer := 7
pr0_ibf_inte  integer := 6
pr0_ibf_rset  integer := 5
pr0_ibf_pdmdwb  integer := 10
pr0_ibf_busy  integer := 9
pr0_ibf_pcwwb  integer := 8
pr0_ibf_brst  integer := 4
pcmd_noop  slv4 := " 0000 "
pcmd_pdmd  slv4 := " 1000 "
pr1_ibf_xpwr  integer := 15
pr1_ibf_icab  integer := 14
pr1_ibf_pcto  integer := 7
pr1_ibf_deuna  integer := 4
state_reset  slv4 := " 0000 "
state_ready  slv4 := " 0010 "
regs_init  regs_type := ( ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) , ' 1 ' , ' 1 ' , ' 0 ' , ' 0 ' , state_reset , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' )

Subtypes

pr0_ibf_pcmd  integer range 3 downto 0
pr0_ibf_pcmdbp  integer range 15 downto 12
pr1_ibf_ecod  integer range 13 downto 8
pr1_ibf_state  integer range 3 downto 0

Signals

R_REGS  regs_type := regs_init
N_REGS  regs_type := regs_init

Records

regs_type 
ibsel slbit
pr0seri slbit
pr0pcei slbit
pr0rxi slbit
pr0txi slbit
pr0dni slbit
pr0rcbi slbit
pr0usci slbit
pr0intr slbit
pr0inte slbit
pr0rset slbit
pr0brst slbit
pr0pcmd slv4
pr1xpwr slbit
pr1icab slbit
pr1pcto slbit
pr1deuna slbit
pr1state slv4
pcbb slv18_1
pdmdwb slbit
busy slbit
pcmdwwb slbit
pcmdbp slv4
resreq slbit
ireq slbit

Detailed Description

Definition at line 48 of file ibdr_deuna.vhd.

Member Function/Procedure/Process Documentation

◆ proc_regs()

proc_regs (   CLK  
)
Process

Definition at line 138 of file ibdr_deuna.vhd.

◆ proc_next()

proc_next (   R_REGS ,
  IB_MREQ ,
  BRESET  
)
Process

Definition at line 145 of file ibdr_deuna.vhd.

Member Data Documentation

◆ ibaddr_deuna

ibaddr_deuna slv16 := slv ( to_unsigned ( 8#174510# , 16 ) )
Constant

Definition at line 50 of file ibdr_deuna.vhd.

◆ ibaddr_pr0

ibaddr_pr0 slv2 := " 00 "
Constant

Definition at line 52 of file ibdr_deuna.vhd.

◆ ibaddr_pr1

ibaddr_pr1 slv2 := " 01 "
Constant

Definition at line 53 of file ibdr_deuna.vhd.

◆ ibaddr_pr2

ibaddr_pr2 slv2 := " 10 "
Constant

Definition at line 54 of file ibdr_deuna.vhd.

◆ ibaddr_pr3

ibaddr_pr3 slv2 := " 11 "
Constant

Definition at line 55 of file ibdr_deuna.vhd.

◆ pr0_ibf_seri

pr0_ibf_seri integer := 15
Constant

Definition at line 57 of file ibdr_deuna.vhd.

◆ pr0_ibf_pcei

pr0_ibf_pcei integer := 14
Constant

Definition at line 58 of file ibdr_deuna.vhd.

◆ pr0_ibf_rxi

pr0_ibf_rxi integer := 13
Constant

Definition at line 59 of file ibdr_deuna.vhd.

◆ pr0_ibf_txi

pr0_ibf_txi integer := 12
Constant

Definition at line 60 of file ibdr_deuna.vhd.

◆ pr0_ibf_dni

pr0_ibf_dni integer := 11
Constant

Definition at line 61 of file ibdr_deuna.vhd.

◆ pr0_ibf_rcbi

pr0_ibf_rcbi integer := 10
Constant

Definition at line 62 of file ibdr_deuna.vhd.

◆ pr0_ibf_usci

pr0_ibf_usci integer := 8
Constant

Definition at line 63 of file ibdr_deuna.vhd.

◆ pr0_ibf_intr

pr0_ibf_intr integer := 7
Constant

Definition at line 64 of file ibdr_deuna.vhd.

◆ pr0_ibf_inte

pr0_ibf_inte integer := 6
Constant

Definition at line 65 of file ibdr_deuna.vhd.

◆ pr0_ibf_rset

pr0_ibf_rset integer := 5
Constant

Definition at line 66 of file ibdr_deuna.vhd.

◆ pr0_ibf_pcmd

pr0_ibf_pcmd integer range 3 downto 0
Subtype

Definition at line 67 of file ibdr_deuna.vhd.

◆ pr0_ibf_pcmdbp

pr0_ibf_pcmdbp integer range 15 downto 12
Subtype

Definition at line 69 of file ibdr_deuna.vhd.

◆ pr0_ibf_pdmdwb

pr0_ibf_pdmdwb integer := 10
Constant

Definition at line 70 of file ibdr_deuna.vhd.

◆ pr0_ibf_busy

pr0_ibf_busy integer := 9
Constant

Definition at line 71 of file ibdr_deuna.vhd.

◆ pr0_ibf_pcwwb

pr0_ibf_pcwwb integer := 8
Constant

Definition at line 72 of file ibdr_deuna.vhd.

◆ pr0_ibf_brst

pr0_ibf_brst integer := 4
Constant

Definition at line 73 of file ibdr_deuna.vhd.

◆ pcmd_noop

pcmd_noop slv4 := " 0000 "
Constant

Definition at line 75 of file ibdr_deuna.vhd.

◆ pcmd_pdmd

pcmd_pdmd slv4 := " 1000 "
Constant

Definition at line 76 of file ibdr_deuna.vhd.

◆ pr1_ibf_xpwr

pr1_ibf_xpwr integer := 15
Constant

Definition at line 78 of file ibdr_deuna.vhd.

◆ pr1_ibf_icab

pr1_ibf_icab integer := 14
Constant

Definition at line 79 of file ibdr_deuna.vhd.

◆ pr1_ibf_ecod

pr1_ibf_ecod integer range 13 downto 8
Subtype

Definition at line 80 of file ibdr_deuna.vhd.

◆ pr1_ibf_pcto

pr1_ibf_pcto integer := 7
Constant

Definition at line 81 of file ibdr_deuna.vhd.

◆ pr1_ibf_deuna

pr1_ibf_deuna integer := 4
Constant

Definition at line 82 of file ibdr_deuna.vhd.

◆ pr1_ibf_state

pr1_ibf_state integer range 3 downto 0
Subtype

Definition at line 83 of file ibdr_deuna.vhd.

◆ state_reset

state_reset slv4 := " 0000 "
Constant

Definition at line 85 of file ibdr_deuna.vhd.

◆ state_ready

state_ready slv4 := " 0010 "
Constant

Definition at line 86 of file ibdr_deuna.vhd.

◆ regs_type

regs_type
Record

Definition at line 88 of file ibdr_deuna.vhd.

◆ ibsel

ibsel slbit
Record

Definition at line 89 of file ibdr_deuna.vhd.

◆ pr0seri

pr0seri slbit
Record

Definition at line 90 of file ibdr_deuna.vhd.

◆ pr0pcei

pr0pcei slbit
Record

Definition at line 91 of file ibdr_deuna.vhd.

◆ pr0rxi

pr0rxi slbit
Record

Definition at line 92 of file ibdr_deuna.vhd.

◆ pr0txi

pr0txi slbit
Record

Definition at line 93 of file ibdr_deuna.vhd.

◆ pr0dni

pr0dni slbit
Record

Definition at line 94 of file ibdr_deuna.vhd.

◆ pr0rcbi

pr0rcbi slbit
Record

Definition at line 95 of file ibdr_deuna.vhd.

◆ pr0usci

pr0usci slbit
Record

Definition at line 96 of file ibdr_deuna.vhd.

◆ pr0intr

pr0intr slbit
Record

Definition at line 97 of file ibdr_deuna.vhd.

◆ pr0inte

pr0inte slbit
Record

Definition at line 98 of file ibdr_deuna.vhd.

◆ pr0rset

pr0rset slbit
Record

Definition at line 99 of file ibdr_deuna.vhd.

◆ pr0brst

pr0brst slbit
Record

Definition at line 100 of file ibdr_deuna.vhd.

◆ pr0pcmd

pr0pcmd slv4
Record

Definition at line 101 of file ibdr_deuna.vhd.

◆ pr1xpwr

pr1xpwr slbit
Record

Definition at line 102 of file ibdr_deuna.vhd.

◆ pr1icab

pr1icab slbit
Record

Definition at line 103 of file ibdr_deuna.vhd.

◆ pr1pcto

pr1pcto slbit
Record

Definition at line 104 of file ibdr_deuna.vhd.

◆ pr1deuna

pr1deuna slbit
Record

Definition at line 105 of file ibdr_deuna.vhd.

◆ pr1state

pr1state slv4
Record

Definition at line 106 of file ibdr_deuna.vhd.

◆ pcbb

pcbb slv18_1
Record

Definition at line 107 of file ibdr_deuna.vhd.

◆ pdmdwb

pdmdwb slbit
Record

Definition at line 108 of file ibdr_deuna.vhd.

◆ busy

busy slbit
Record

Definition at line 109 of file ibdr_deuna.vhd.

◆ pcmdwwb

pcmdwwb slbit
Record

Definition at line 110 of file ibdr_deuna.vhd.

◆ pcmdbp

pcmdbp slv4
Record

Definition at line 111 of file ibdr_deuna.vhd.

◆ resreq

resreq slbit
Record

Definition at line 112 of file ibdr_deuna.vhd.

◆ ireq

ireq slbit
Record

Definition at line 113 of file ibdr_deuna.vhd.

◆ regs_init

regs_init regs_type := ( ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) , ' 1 ' , ' 1 ' , ' 0 ' , ' 0 ' , state_reset , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' , ' 0 ' , ( others = > ' 0 ' ) , ' 0 ' , ' 0 ' )
Constant

Definition at line 116 of file ibdr_deuna.vhd.

◆ R_REGS

R_REGS regs_type := regs_init
Signal

Definition at line 133 of file ibdr_deuna.vhd.

◆ N_REGS

N_REGS regs_type := regs_init
Signal

Definition at line 134 of file ibdr_deuna.vhd.

The documentation for this design unit was generated from the following file: