syn Architecture Reference

Architecture >> syn

Processes
proc_regs	( CLK )
proc_next	( R_REGS , RLIM_CEV , SEL , START , STOP )

Constants
regs_init	regs_type := ( ( others = > ' 0 ' ) , ' 0 ' )

Signals
R_REGS	regs_type := regs_init
N_REGS	regs_type := regs_init

Records
regs_type
cnt	slv3
busy	slbit

Detailed Description

Definition at line 52 of file ib_rlim_slv.vhd.

Member Function/Procedure/Process Documentation

proc_regs()

proc_regs (   CLK   )

Process

Definition at line 69 of file ib_rlim_slv.vhd.

proc_next()

proc_next (   R_REGS ,   RLIM_CEV ,   SEL ,   START ,   STOP   )

Process

Definition at line 80 of file ib_rlim_slv.vhd.

Member Data Documentation

regs_type

regs_type

Record

Definition at line 54 of file ib_rlim_slv.vhd.

cnt

cnt slv3

Record

Definition at line 55 of file ib_rlim_slv.vhd.

busy

busy slbit

Record

Definition at line 56 of file ib_rlim_slv.vhd.

regs_init

regs_init regs_type := ( ( others = > ' 0 ' ) , ' 0 ' )

Constant

Definition at line 59 of file ib_rlim_slv.vhd.

R_REGS

R_REGS regs_type := regs_init

Signal

Definition at line 64 of file ib_rlim_slv.vhd.

N_REGS

N_REGS regs_type := regs_init

Signal

Definition at line 65 of file ib_rlim_slv.vhd.

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The documentation for this design unit was generated from the following file:

• ibus/ib_rlim_slv.vhd