syn Architecture Reference

Architecture >> syn

Processes
proc_regs	( CLK )
proc_next	( R_AUX , R_DATA )

Signals
R_AUX	slbit := ' 1 '
R_DATA	slv ( DWIDTH - 1 downto 0 ) := ( others = > ' 0 ' )
N_DATA	slv ( DWIDTH - 1 downto 0 ) := ( others = > ' 0 ' )

Detailed Description

Definition at line 54 of file gray_cnt_n.vhd.

Member Function/Procedure/Process Documentation

proc_regs()

proc_regs (   CLK   )

Process

Definition at line 66 of file gray_cnt_n.vhd.

proc_next()

proc_next (   R_AUX ,   R_DATA   )

Process

Definition at line 80 of file gray_cnt_n.vhd.

Member Data Documentation

R_AUX

R_AUX slbit := ' 1 '

Signal

Definition at line 56 of file gray_cnt_n.vhd.

R_DATA

R_DATA slv ( DWIDTH - 1 downto 0 ) := ( others = > ' 0 ' )

Signal

Definition at line 57 of file gray_cnt_n.vhd.

N_DATA

N_DATA slv ( DWIDTH - 1 downto 0 ) := ( others = > ' 0 ' )

Signal

Definition at line 58 of file gray_cnt_n.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/genlib/gray_cnt_n.vhd