w11 - vhd 0.794
W11 CPU core and support modules
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sn_humanio_rbus.vhd
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1-- $Id: sn_humanio_rbus.vhd 1181 2019-07-08 17:00:50Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2010-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Module Name: sn_humanio_rbus - syn
7-- Description: sn_humanio with rbus interceptor
8--
9-- Dependencies: bpgen/sn_humanio
10--
11-- Test bench: -
12--
13-- Target Devices: generic
14-- Tool versions: ise 11.4-14.7; viv 2014.4-2019.1; ghdl 0.26-0.35
15--
16-- Synthesized (xst):
17-- Date Rev ise Target flop lutl lutm slic t peri
18-- 2015-01-28 639 14.7 131013 xc6slx16-2 253 223 0 97 s 3.6 ns (n4)
19-- 2015-01-28 639 14.7 131013 xc6slx16-2 141 120 0 42 s 3.5 ns (n2)
20-- 2015-01-25 583 14.7 131013 xc6slx16-2 140 120 0 46 s 3.5 ns
21-- 2011-08-14 406 12.1 M53d xc3s1000-4 142 156 0 123 s 5.1 ns
22-- 2011-08-07 404 12.1 M53d xc3s1000-4 142 157 0 124 s 5.1 ns
23-- 2010-12-29 351 12.1 M53d xc3s1000-4 93 138 0 111 s 6.8 ns
24-- 2010-06-03 300 11.4 L68 xc3s1000-4 92 137 0 111 s 6.7 ns
25--
26-- Revision History:
27-- Date Rev Version Comment
28-- 2017-06-11 912 2.0.1 add stat_rbf_emu (=0); single cycle btn pulses
29-- 2015-01-31 640 2.0 add SWIDTH,LWIDTH,DCWIDTH, change register layout
30-- 2014-08-15 583 1.3 rb_mreq addr now 16 bit
31-- 2011-11-19 427 1.2.1 now numeric_std clean
32-- 2011-08-14 406 1.2 common register layout with bp_swibtnled_rbus
33-- 2011-08-07 404 1.3 add pipeline regs ledin,(swi,btn,led,dp,dat)eff
34-- 2011-07-08 390 1.2 renamed from s3_humanio_rbus, add BWIDTH generic
35-- 2010-12-29 351 1.1 renamed from s3_humanio_rri; ported to rbv3
36-- 2010-06-18 306 1.0.1 rename rbus data fields to _rbf_
37-- 2010-06-03 300 1.0 Initial version
38------------------------------------------------------------------------------
39--
40-- rbus registers:
41--
42-- Addr Bits Name r/w/f Function
43-- 000 stat r/-/- Status register
44-- 15 emu r/-/- emulation (always 0)
45-- 14:12 hdig r/-/- display size as (2**DCWIDTH)-1
46-- 11:08 hled r/-/- led size as LWIDTH-1
47-- 7:04 hbtn r/-/- button size as BWIDTH-1
48-- 3:00 hswi r/-/- switch size as SWIDTH-1
49--
50-- 001 cntl r/w/- Control register
51-- 4 dsp1_en r/w/- if 1 display msb will be driven by rbus
52-- 3 dsp0_en r/w/- if 1 display lsb will be driven by rbus
53-- 2 dp_en r/w/- if 1 display dp's will be driven by rbus
54-- 1 led_en r/w/- if 1 LED will be driven by rbus
55-- 0 swi_en r/w/- if 1 SWI will be driven by rbus
56--
57-- 010 x:00 btn r/-/f r: return hio BTN status
58-- w: will pulse BTN
59--
60-- 011 x:00 swi r/w/- r: return hio SWI status
61-- w: will drive SWI when swi_en=1
62--
63-- 100 x:00 led r/w/- r: return hio LED status
64-- w: will drive LED when led_en=1
65--
66-- 101 x:00 dp r/w/- r: return hio DSP_DP status
67-- w: will drive dp's when dp_en=1
68--
69-- 110 15:00 dsp0 r/w/- r: return hio DSP_DAT lsb status
70-- w: will drive DSP_DAT lsb when dsp_en=1
71-- 111 15:00 dsp1 r/w/- r: return hio DSP_DAT msb status
72-- w: will drive DSP_DAT msb when dsp_en=1
73--
74
75library ieee;
76use ieee.std_logic_1164.all;
77use ieee.numeric_std.all;
78
79use work.slvtypes.all;
80use work.rblib.all;
81use work.bpgenlib.all;
82
83-- ----------------------------------------------------------------------------
84
85entity sn_humanio_rbus is -- human i/o handling /w rbus intercept
86 generic (
87 SWIDTH : positive := 8; -- SWI port width
88 BWIDTH : positive := 4; -- BTN port width
89 LWIDTH : positive := 8; -- LED port width
90 DCWIDTH : positive := 2; -- digit counter width (2 or 3)
91 DEBOUNCE : boolean := true; -- instantiate debouncer for SWI,BTN
92 RB_ADDR : slv16 := x"fef0");
93 port (
94 CLK : in slbit; -- clock
95 RESET : in slbit := '0'; -- reset
96 CE_MSEC : in slbit; -- 1 ms clock enable
97 RB_MREQ : in rb_mreq_type; -- rbus: request
98 RB_SRES : out rb_sres_type; -- rbus: response
99 SWI : out slv(SWIDTH-1 downto 0); -- switch settings, debounced
100 BTN : out slv(BWIDTH-1 downto 0); -- button settings, debounced
101 LED : in slv(LWIDTH-1 downto 0); -- led data
102 DSP_DAT : in slv(4*(2**DCWIDTH)-1 downto 0); -- display data
103 DSP_DP : in slv((2**DCWIDTH)-1 downto 0); -- display decimal points
104 I_SWI : in slv(SWIDTH-1 downto 0); -- pad-i: switches
105 I_BTN : in slv(BWIDTH-1 downto 0); -- pad-i: buttons
106 O_LED : out slv(LWIDTH-1 downto 0); -- pad-o: leds
107 O_ANO_N : out slv((2**DCWIDTH)-1 downto 0); -- pad-o: disp: anodes (act.low)
108 O_SEG_N : out slv8 -- pad-o: disp: segments (act.low)
109 );
111
112architecture syn of sn_humanio_rbus is
113
114 type regs_type is record
115 rbsel : slbit; -- rbus select
116 swi : slv(SWIDTH-1 downto 0); -- rbus swi
117 btn : slv(BWIDTH-1 downto 0); -- rbus btn
118 led : slv(LWIDTH-1 downto 0); -- rbus led
119 dsp_dat : slv(4*(2**DCWIDTH)-1 downto 0); -- rbus dsp_dat
120 dsp_dp : slv((2**DCWIDTH)-1 downto 0); -- rbus dsp_dp
121 ledin : slv(LWIDTH-1 downto 0); -- led from design
122 swieff : slv(SWIDTH-1 downto 0); -- effective swi
123 btneff : slv(BWIDTH-1 downto 0); -- effective btn
124 ledeff : slv(LWIDTH-1 downto 0); -- effective led
125 dateff : slv(4*(2**DCWIDTH)-1 downto 0); -- effective dsp_dat
126 dpeff : slv((2**DCWIDTH)-1 downto 0); -- effective dsp_dp
127 swi_en : slbit; -- enable: swi from rbus
128 led_en : slbit; -- enable: led from rbus
129 dsp0_en : slbit; -- enable: dsp_dat lsb from rbus
130 dsp1_en : slbit; -- enable: dsp_dat msb from rbus
131 dp_en : slbit; -- enable: dsp_dp from rbus
132 end record regs_type;
133
134 constant swizero : slv(SWIDTH-1 downto 0) := (others=>'0');
135 constant btnzero : slv(BWIDTH-1 downto 0) := (others=>'0');
136 constant ledzero : slv(LWIDTH-1 downto 0) := (others=>'0');
137 constant dpzero : slv((2**DCWIDTH)-1 downto 0) := (others=>'0');
138 constant datzero : slv(4*(2**DCWIDTH)-1 downto 0) := (others=>'0');
139
140 constant regs_init : regs_type := (
141 '0', -- rbsel
142 swizero, -- swi
143 btnzero, -- btn
144 ledzero, -- led
145 datzero, -- dsp_dat
146 dpzero, -- dsp_dp
147 ledzero, -- ledin
148 swizero, -- swieff
149 btnzero, -- btneff
150 ledzero, -- ledeff
151 datzero, -- dateff
152 dpzero, -- dpeff
153 '0','0','0','0','0' -- (swi|led|dsp0|dsp1|dp)_en
154 );
155
156 signal R_REGS : regs_type := regs_init; -- state registers
157 signal N_REGS : regs_type := regs_init; -- next value state regs
158
159 constant stat_rbf_emu: integer := 15;
160 subtype stat_rbf_hdig is integer range 14 downto 12;
161 subtype stat_rbf_hled is integer range 11 downto 8;
162 subtype stat_rbf_hbtn is integer range 7 downto 4;
163 subtype stat_rbf_hswi is integer range 3 downto 0;
164
165 constant cntl_rbf_dsp1_en: integer := 4;
166 constant cntl_rbf_dsp0_en: integer := 3;
167 constant cntl_rbf_dp_en: integer := 2;
168 constant cntl_rbf_led_en: integer := 1;
169 constant cntl_rbf_swi_en: integer := 0;
170
171 constant rbaddr_stat: slv3 := "000"; -- 0 r/-/-
172 constant rbaddr_cntl: slv3 := "001"; -- 0 r/w/-
173 constant rbaddr_btn: slv3 := "010"; -- 1 r/-/f
174 constant rbaddr_swi: slv3 := "011"; -- 1 r/w/-
175 constant rbaddr_led: slv3 := "100"; -- 2 r/w/-
176 constant rbaddr_dp: slv3 := "101"; -- 3 r/w/-
177 constant rbaddr_dsp0: slv3 := "110"; -- 4 r/w/-
178 constant rbaddr_dsp1: slv3 := "111"; -- 5 r/w/-
179
180 subtype dspdat_msb is integer range 4*(2**DCWIDTH)-1 downto 4*(2**DCWIDTH)-16;
181 subtype dspdat_lsb is integer range 15 downto 0;
182
183 signal HIO_SWI : slv(SWIDTH-1 downto 0) := (others=>'0');
184 signal HIO_BTN : slv(BWIDTH-1 downto 0) := (others=>'0');
185 signal HIO_LED : slv(LWIDTH-1 downto 0) := (others=>'0');
186 signal HIO_DSP_DAT : slv(4*(2**DCWIDTH)-1 downto 0) := (others=>'0');
187 signal HIO_DSP_DP : slv((2**DCWIDTH)-1 downto 0) := (others=>'0');
188
189begin
190
191 assert SWIDTH<=16
192 report "assert (SWIDTH<=16)"
193 severity failure;
194 assert BWIDTH<=8
195 report "assert (BWIDTH<=8)"
196 severity failure;
197 assert LWIDTH<=16
198 report "assert (LWIDTH<=16)"
199 severity failure;
200
201 assert DCWIDTH=2 or DCWIDTH=3
202 report "assert(DCWIDTH=2 or DCWIDTH=3): unsupported DCWIDTH"
203 severity FAILURE;
204
205 HIO : sn_humanio
206 generic map (
207 SWIDTH => SWIDTH,
208 BWIDTH => BWIDTH,
209 LWIDTH => LWIDTH,
210 DCWIDTH => DCWIDTH,
212 port map (
213 CLK => CLK,
214 RESET => RESET,
215 CE_MSEC => CE_MSEC,
216 SWI => HIO_SWI,
217 BTN => HIO_BTN,
218 LED => HIO_LED,
221 I_SWI => I_SWI,
222 I_BTN => I_BTN,
223 O_LED => O_LED,
224 O_ANO_N => O_ANO_N,
226 );
227
228 proc_regs: process (CLK)
229 begin
230
231 if rising_edge(CLK) then
232 if RESET = '1' then
233 R_REGS <= regs_init;
234 else
235 R_REGS <= N_REGS;
236 end if;
237 end if;
238
239 end process proc_regs;
240
241 proc_next: process (R_REGS, RB_MREQ, LED, DSP_DAT, DSP_DP,
243
244 variable r : regs_type := regs_init;
245 variable n : regs_type := regs_init;
246
247 variable irb_ack : slbit := '0';
248 variable irb_busy : slbit := '0';
249 variable irb_err : slbit := '0';
250 variable irb_dout : slv16 := (others=>'0');
251 variable irbena : slbit := '0';
252
253 begin
254
255 r := R_REGS;
256 n := R_REGS;
257
258 irb_ack := '0';
259 irb_busy := '0';
260 irb_err := '0';
261 irb_dout := (others=>'0');
262
263 irbena := RB_MREQ.re or RB_MREQ.we;
264
265 -- input register for LED signal
266 n.ledin := LED;
267 -- clear btn register --> cause single cycle pulses
268 n.btn := (others=>'0');
269
270 -- rbus address decoder
271 n.rbsel := '0';
272 if RB_MREQ.aval='1' and RB_MREQ.addr(15 downto 3)=RB_ADDR(15 downto 3) then
273 n.rbsel := '1';
274 end if;
275
276 -- rbus transactions
277 if r.rbsel = '1' then
278 irb_ack := irbena; -- ack all accesses
279
280 case RB_MREQ.addr(2 downto 0) is
281
282 when rbaddr_stat =>
283 irb_dout(stat_rbf_emu) := '0';
284 irb_dout(stat_rbf_hdig) := slv(to_unsigned((2**DCWIDTH)-1,3));
285 irb_dout(stat_rbf_hled) := slv(to_unsigned(LWIDTH-1,4));
286 irb_dout(stat_rbf_hbtn) := slv(to_unsigned(BWIDTH-1,4));
287 irb_dout(stat_rbf_hswi) := slv(to_unsigned(SWIDTH-1,4));
288 if RB_MREQ.we = '1' then
289 irb_ack := '0';
290 end if;
291
292 when rbaddr_cntl =>
293 irb_dout(cntl_rbf_dsp1_en) := r.dsp1_en;
294 irb_dout(cntl_rbf_dsp0_en) := r.dsp0_en;
295 irb_dout(cntl_rbf_dp_en) := r.dp_en;
296 irb_dout(cntl_rbf_led_en) := r.led_en;
297 irb_dout(cntl_rbf_swi_en) := r.swi_en;
298 if RB_MREQ.we = '1' then
299 n.dsp1_en := RB_MREQ.din(cntl_rbf_dsp1_en);
300 n.dsp0_en := RB_MREQ.din(cntl_rbf_dsp0_en);
301 n.dp_en := RB_MREQ.din(cntl_rbf_dp_en);
302 n.led_en := RB_MREQ.din(cntl_rbf_led_en);
303 n.swi_en := RB_MREQ.din(cntl_rbf_swi_en);
304 end if;
305
306 when rbaddr_btn =>
307 irb_dout(HIO_BTN'range) := HIO_BTN;
308 if RB_MREQ.we = '1' then
309 n.btn := RB_MREQ.din(n.btn'range);
310 end if;
311
312 when rbaddr_swi =>
313 irb_dout(HIO_SWI'range) := HIO_SWI;
314 if RB_MREQ.we = '1' then
315 n.swi := RB_MREQ.din(n.swi'range);
316 end if;
317
318 when rbaddr_led =>
319 irb_dout(r.ledin'range) := r.ledin;
320 if RB_MREQ.we = '1' then
321 n.led := RB_MREQ.din(n.led'range);
322 end if;
323
324 when rbaddr_dp =>
325 irb_dout(HIO_DSP_DP'range) := HIO_DSP_DP;
326 if RB_MREQ.we = '1' then
327 n.dsp_dp := RB_MREQ.din(n.dsp_dp'range);
328 end if;
329
330 when rbaddr_dsp0 =>
331 irb_dout := HIO_DSP_DAT(dspdat_lsb);
332 if RB_MREQ.we = '1' then
333 n.dsp_dat(dspdat_lsb) := RB_MREQ.din;
334 end if;
335
336 when rbaddr_dsp1 =>
337 irb_dout := HIO_DSP_DAT(dspdat_msb);
338 if RB_MREQ.we = '1' then
339 n.dsp_dat(dspdat_msb) := RB_MREQ.din;
340 end if;
341
342 when others => null;
343 end case;
344
345 end if;
346
347 n.btneff := HIO_BTN or r.btn;
348
349 if r.swi_en = '0' then
350 n.swieff := HIO_SWI;
351 else
352 n.swieff := r.swi;
353 end if;
354
355 if r.led_en = '0' then
356 n.ledeff := r.ledin;
357 else
358 n.ledeff := r.led;
359 end if;
360
361 if r.dp_en = '0' then
362 n.dpeff := DSP_DP;
363 else
364 n.dpeff := r.dsp_dp;
365 end if;
366
367 if r.dsp0_en = '0' then
368 n.dateff(dspdat_lsb) := DSP_DAT(dspdat_lsb);
369 else
370 n.dateff(dspdat_lsb) := r.dsp_dat(dspdat_lsb);
371 end if;
372
373 if DCWIDTH=3 then
374 if r.dsp1_en = '0' then
375 n.dateff(dspdat_msb) := DSP_DAT(dspdat_msb);
376 else
377 n.dateff(dspdat_msb) := r.dsp_dat(dspdat_msb);
378 end if;
379 end if;
380
381 N_REGS <= n;
382
383 BTN <= R_REGS.btneff;
384 SWI <= R_REGS.swieff;
385 HIO_LED <= R_REGS.ledeff;
386 HIO_DSP_DP <= R_REGS.dpeff;
387 HIO_DSP_DAT <= R_REGS.dateff;
388
389 RB_SRES <= rb_sres_init;
390 RB_SRES.ack <= irb_ack;
391 RB_SRES.busy <= irb_busy;
392 RB_SRES.err <= irb_err;
393 RB_SRES.dout <= irb_dout;
394
395 end process proc_next;
396
397end syn;
Definition: rblib.vhd:32
std_logic_vector( 2 downto 0) slv3
Definition: slvtypes.vhd:35
std_logic_vector( 15 downto 0) slv16
Definition: slvtypes.vhd:48
std_logic slbit
Definition: slvtypes.vhd:30
std_logic_vector( 7 downto 0) slv8
Definition: slvtypes.vhd:40
std_logic_vector slv
Definition: slvtypes.vhd:31
slv( LWIDTH- 1 downto 0) :=( others => '0') HIO_LED
integer range 14 downto 12 stat_rbf_hdig
integer := 1 cntl_rbf_led_en
integer range 4*( 2** DCWIDTH)- 1 downto 4*( 2** DCWIDTH)- 16 dspdat_msb
slv3 := "111" rbaddr_dsp1
slv( LWIDTH- 1 downto 0) :=( others => '0') ledzero
slv3 := "101" rbaddr_dp
slv3 := "100" rbaddr_led
slv( 4*( 2** DCWIDTH)- 1 downto 0) :=( others => '0') datzero
integer := 4 cntl_rbf_dsp1_en
integer := 2 cntl_rbf_dp_en
slv3 := "001" rbaddr_cntl
integer range 7 downto 4 stat_rbf_hbtn
regs_type := regs_init N_REGS
slv( BWIDTH- 1 downto 0) :=( others => '0') HIO_BTN
slv( SWIDTH- 1 downto 0) :=( others => '0') HIO_SWI
slv3 := "010" rbaddr_btn
slv3 := "110" rbaddr_dsp0
slv(( 2** DCWIDTH)- 1 downto 0) :=( others => '0') HIO_DSP_DP
slv( BWIDTH- 1 downto 0) :=( others => '0') btnzero
slv(( 2** DCWIDTH)- 1 downto 0) :=( others => '0') dpzero
slv( 4*( 2** DCWIDTH)- 1 downto 0) :=( others => '0') HIO_DSP_DAT
integer range 11 downto 8 stat_rbf_hled
regs_type := regs_init R_REGS
slv( SWIDTH- 1 downto 0) :=( others => '0') swizero
integer range 15 downto 0 dspdat_lsb
integer range 3 downto 0 stat_rbf_hswi
integer := 3 cntl_rbf_dsp0_en
slv3 := "011" rbaddr_swi
integer := 0 cntl_rbf_swi_en
regs_type :=( '0', swizero, btnzero, ledzero, datzero, dpzero, ledzero, swizero, btnzero, ledzero, datzero, dpzero, '0', '0', '0', '0', '0') regs_init
slv3 := "000" rbaddr_stat
integer := 15 stat_rbf_emu
in DSP_DP slv(( 2** DCWIDTH)- 1 downto 0)
DEBOUNCE boolean := true
out O_LED slv( LWIDTH- 1 downto 0)
RB_ADDR slv16 := x"fef0"
in DSP_DAT slv( 4*( 2** DCWIDTH)- 1 downto 0)
DCWIDTH positive := 2
out SWI slv( SWIDTH- 1 downto 0)
in I_BTN slv( BWIDTH- 1 downto 0)
LWIDTH positive := 8
in I_SWI slv( SWIDTH- 1 downto 0)
SWIDTH positive := 8
out BTN slv( BWIDTH- 1 downto 0)
in RB_MREQ rb_mreq_type
BWIDTH positive := 4
out O_ANO_N slv(( 2** DCWIDTH)- 1 downto 0)
out RB_SRES rb_sres_type
in LED slv( LWIDTH- 1 downto 0)
in RESET slbit := '0'
in DSP_DP slv(( 2** DCWIDTH)- 1 downto 0)
Definition: sn_humanio.vhd:63
DEBOUNCE boolean := true
Definition: sn_humanio.vhd:54
out O_LED slv( LWIDTH- 1 downto 0)
Definition: sn_humanio.vhd:66
in DSP_DAT slv( 4*( 2** DCWIDTH)- 1 downto 0)
Definition: sn_humanio.vhd:62
DCWIDTH positive := 2
Definition: sn_humanio.vhd:53
out SWI slv( SWIDTH- 1 downto 0)
Definition: sn_humanio.vhd:59
in I_BTN slv( BWIDTH- 1 downto 0)
Definition: sn_humanio.vhd:65
LWIDTH positive := 8
Definition: sn_humanio.vhd:52
in I_SWI slv( SWIDTH- 1 downto 0)
Definition: sn_humanio.vhd:64
out O_SEG_N slv8
Definition: sn_humanio.vhd:69
SWIDTH positive := 8
Definition: sn_humanio.vhd:50
out BTN slv( BWIDTH- 1 downto 0)
Definition: sn_humanio.vhd:60
in CLK slbit
Definition: sn_humanio.vhd:56
BWIDTH positive := 4
Definition: sn_humanio.vhd:51
out O_ANO_N slv(( 2** DCWIDTH)- 1 downto 0)
Definition: sn_humanio.vhd:67
in LED slv( LWIDTH- 1 downto 0)
Definition: sn_humanio.vhd:61
in RESET slbit := '0'
Definition: sn_humanio.vhd:57
in CE_MSEC slbit
Definition: sn_humanio.vhd:58