w11 - vhd 0.794
W11 CPU core and support modules
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Libraries | Ports | Use Clauses
sramif_mig_artys7 Entity Reference
Inheritance diagram for sramif_mig_artys7:
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Collaboration diagram for sramif_mig_artys7:
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Entities

syn  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
numeric_std 
slvtypes  Package <slvtypes>
cdclib  Package <cdclib>
miglib  Package <miglib>
miglib_artys7  Package <miglib_artys7>

Ports

CLK   in   slbit
RESET   in   slbit
REQ   in   slbit
WE   in   slbit
BUSY   out   slbit
ACK_R   out   slbit
ACK_W   out   slbit
ACT_R   out   slbit
ACT_W   out   slbit
ADDR   in   slv20
BE   in   slv4
DI   in   slv32
DO   out   slv32
CLKMIG   in   slbit
CLKREF   in   slbit
TEMP   in   slv12
MONI   out   sramif2migui_moni_type
DDR3_DQ   inout   slv16
DDR3_DQS_P   inout   slv2
DDR3_DQS_N   inout   slv2
DDR3_ADDR   out   slv14
DDR3_BA   out   slv3
DDR3_RAS_N   out   slbit
DDR3_CAS_N   out   slbit
DDR3_WE_N   out   slbit
DDR3_RESET_N   out   slbit
DDR3_CK_P   out   slv1
DDR3_CK_N   out   slv1
DDR3_CKE   out   slv1
DDR3_CS_N   out   slv1
DDR3_DM   out   slv2
DDR3_ODT   out   slv1

Detailed Description

Definition at line 32 of file sramif_mig_artys7.vhd.

Member Data Documentation

◆ CLK

CLK in slbit
Port

Definition at line 34 of file sramif_mig_artys7.vhd.

◆ RESET

RESET in slbit
Port

Definition at line 35 of file sramif_mig_artys7.vhd.

◆ REQ

REQ in slbit
Port

Definition at line 36 of file sramif_mig_artys7.vhd.

◆ WE

WE in slbit
Port

Definition at line 37 of file sramif_mig_artys7.vhd.

◆ BUSY

BUSY out slbit
Port

Definition at line 38 of file sramif_mig_artys7.vhd.

◆ ACK_R

ACK_R out slbit
Port

Definition at line 39 of file sramif_mig_artys7.vhd.

◆ ACK_W

ACK_W out slbit
Port

Definition at line 40 of file sramif_mig_artys7.vhd.

◆ ACT_R

ACT_R out slbit
Port

Definition at line 41 of file sramif_mig_artys7.vhd.

◆ ACT_W

ACT_W out slbit
Port

Definition at line 42 of file sramif_mig_artys7.vhd.

◆ ADDR

ADDR in slv20
Port

Definition at line 43 of file sramif_mig_artys7.vhd.

◆ BE

BE in slv4
Port

Definition at line 44 of file sramif_mig_artys7.vhd.

◆ DI

DI in slv32
Port

Definition at line 45 of file sramif_mig_artys7.vhd.

◆ DO

DO out slv32
Port

Definition at line 46 of file sramif_mig_artys7.vhd.

◆ CLKMIG

CLKMIG in slbit
Port

Definition at line 47 of file sramif_mig_artys7.vhd.

◆ CLKREF

CLKREF in slbit
Port

Definition at line 48 of file sramif_mig_artys7.vhd.

◆ TEMP

TEMP in slv12
Port

Definition at line 49 of file sramif_mig_artys7.vhd.

◆ MONI

MONI out sramif2migui_moni_type
Port

Definition at line 50 of file sramif_mig_artys7.vhd.

◆ DDR3_DQ

DDR3_DQ inout slv16
Port

Definition at line 51 of file sramif_mig_artys7.vhd.

◆ DDR3_DQS_P

DDR3_DQS_P inout slv2
Port

Definition at line 52 of file sramif_mig_artys7.vhd.

◆ DDR3_DQS_N

DDR3_DQS_N inout slv2
Port

Definition at line 53 of file sramif_mig_artys7.vhd.

◆ DDR3_ADDR

DDR3_ADDR out slv14
Port

Definition at line 54 of file sramif_mig_artys7.vhd.

◆ DDR3_BA

DDR3_BA out slv3
Port

Definition at line 55 of file sramif_mig_artys7.vhd.

◆ DDR3_RAS_N

DDR3_RAS_N out slbit
Port

Definition at line 56 of file sramif_mig_artys7.vhd.

◆ DDR3_CAS_N

DDR3_CAS_N out slbit
Port

Definition at line 57 of file sramif_mig_artys7.vhd.

◆ DDR3_WE_N

DDR3_WE_N out slbit
Port

Definition at line 58 of file sramif_mig_artys7.vhd.

◆ DDR3_RESET_N

DDR3_RESET_N out slbit
Port

Definition at line 59 of file sramif_mig_artys7.vhd.

◆ DDR3_CK_P

DDR3_CK_P out slv1
Port

Definition at line 60 of file sramif_mig_artys7.vhd.

◆ DDR3_CK_N

DDR3_CK_N out slv1
Port

Definition at line 61 of file sramif_mig_artys7.vhd.

◆ DDR3_CKE

DDR3_CKE out slv1
Port

Definition at line 62 of file sramif_mig_artys7.vhd.

◆ DDR3_CS_N

DDR3_CS_N out slv1
Port

Definition at line 63 of file sramif_mig_artys7.vhd.

◆ DDR3_DM

DDR3_DM out slv2
Port

Definition at line 64 of file sramif_mig_artys7.vhd.

◆ DDR3_ODT

DDR3_ODT out slv1
Port

Definition at line 66 of file sramif_mig_artys7.vhd.

◆ ieee

ieee
Library

Definition at line 23 of file sramif_mig_artys7.vhd.

◆ std_logic_1164

std_logic_1164
use clause

Definition at line 24 of file sramif_mig_artys7.vhd.

◆ numeric_std

numeric_std
use clause

Definition at line 25 of file sramif_mig_artys7.vhd.

◆ slvtypes

slvtypes
use clause

Definition at line 27 of file sramif_mig_artys7.vhd.

◆ cdclib

cdclib
use clause

Definition at line 28 of file sramif_mig_artys7.vhd.

◆ miglib

miglib
use clause

Definition at line 29 of file sramif_mig_artys7.vhd.

◆ miglib_artys7

miglib_artys7
use clause

Definition at line 30 of file sramif_mig_artys7.vhd.

The documentation for this design unit was generated from the following file: