w11 - vhd 0.794
W11 CPU core and support modules
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Generics | Libraries | Ports | Use Clauses
sramif2migui_core Entity Reference
Inheritance diagram for sramif2migui_core:
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Collaboration diagram for sramif2migui_core:
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Entities

syn  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
numeric_std 
slvtypes  Package <slvtypes>
memlib  Package <memlib>
cdclib  Package <cdclib>
miglib  Package <miglib>

Generics

BAWIDTH  positive := 4
MAWIDTH  positive := 28

Ports

CLK   in   slbit
RESET   in   slbit
REQ   in   slbit
WE   in   slbit
BUSY   out   slbit
ACK_R   out   slbit
ACK_W   out   slbit
ACT_R   out   slbit
ACT_W   out   slbit
ADDR   in   slv20
BE   in   slv4
DI   in   slv32
DO   out   slv32
MONI   out   sramif2migui_moni_type
UI_CLK   in   slbit
UI_CLK_SYNC_RST   in   slbit
INIT_CALIB_COMPLETE   in   slbit
APP_RDY   in   slbit
APP_EN   out   slbit
APP_CMD   out   slv3
APP_ADDR   out   slv ( MAWIDTH - 1 downto 0 )
APP_WDF_RDY   in   slbit
APP_WDF_WREN   out   slbit
APP_WDF_DATA   out   slv ( 8 * ( 2 ** BAWIDTH ) - 1 downto 0 )
APP_WDF_MASK   out   slv ( ( 2 ** BAWIDTH ) - 1 downto 0 )
APP_WDF_END   out   slbit
APP_RD_DATA_VALID   in   slbit
APP_RD_DATA   in   slv ( 8 * ( 2 ** BAWIDTH ) - 1 downto 0 )
APP_RD_DATA_END   in   slbit

Detailed Description

Definition at line 31 of file sramif2migui_core.vhd.

Member Data Documentation

◆ BAWIDTH

BAWIDTH positive := 4
Generic

Definition at line 33 of file sramif2migui_core.vhd.

◆ MAWIDTH

MAWIDTH positive := 28
Generic

Definition at line 34 of file sramif2migui_core.vhd.

◆ CLK

CLK in slbit
Port

Definition at line 36 of file sramif2migui_core.vhd.

◆ RESET

RESET in slbit
Port

Definition at line 37 of file sramif2migui_core.vhd.

◆ REQ

REQ in slbit
Port

Definition at line 38 of file sramif2migui_core.vhd.

◆ WE

WE in slbit
Port

Definition at line 39 of file sramif2migui_core.vhd.

◆ BUSY

BUSY out slbit
Port

Definition at line 40 of file sramif2migui_core.vhd.

◆ ACK_R

ACK_R out slbit
Port

Definition at line 41 of file sramif2migui_core.vhd.

◆ ACK_W

ACK_W out slbit
Port

Definition at line 42 of file sramif2migui_core.vhd.

◆ ACT_R

ACT_R out slbit
Port

Definition at line 43 of file sramif2migui_core.vhd.

◆ ACT_W

ACT_W out slbit
Port

Definition at line 44 of file sramif2migui_core.vhd.

◆ ADDR

ADDR in slv20
Port

Definition at line 45 of file sramif2migui_core.vhd.

◆ BE

BE in slv4
Port

Definition at line 46 of file sramif2migui_core.vhd.

◆ DI

DI in slv32
Port

Definition at line 47 of file sramif2migui_core.vhd.

◆ DO

DO out slv32
Port

Definition at line 48 of file sramif2migui_core.vhd.

◆ MONI

MONI out sramif2migui_moni_type
Port

Definition at line 49 of file sramif2migui_core.vhd.

◆ UI_CLK

UI_CLK in slbit
Port

Definition at line 50 of file sramif2migui_core.vhd.

◆ UI_CLK_SYNC_RST

UI_CLK_SYNC_RST in slbit
Port

Definition at line 51 of file sramif2migui_core.vhd.

◆ INIT_CALIB_COMPLETE

INIT_CALIB_COMPLETE in slbit
Port

Definition at line 52 of file sramif2migui_core.vhd.

◆ APP_RDY

APP_RDY in slbit
Port

Definition at line 53 of file sramif2migui_core.vhd.

◆ APP_EN

APP_EN out slbit
Port

Definition at line 54 of file sramif2migui_core.vhd.

◆ APP_CMD

APP_CMD out slv3
Port

Definition at line 55 of file sramif2migui_core.vhd.

◆ APP_ADDR

APP_ADDR out slv ( MAWIDTH - 1 downto 0 )
Port

Definition at line 56 of file sramif2migui_core.vhd.

◆ APP_WDF_RDY

APP_WDF_RDY in slbit
Port

Definition at line 57 of file sramif2migui_core.vhd.

◆ APP_WDF_WREN

APP_WDF_WREN out slbit
Port

Definition at line 58 of file sramif2migui_core.vhd.

◆ APP_WDF_DATA

APP_WDF_DATA out slv ( 8 * ( 2 ** BAWIDTH ) - 1 downto 0 )
Port

Definition at line 59 of file sramif2migui_core.vhd.

◆ APP_WDF_MASK

APP_WDF_MASK out slv ( ( 2 ** BAWIDTH ) - 1 downto 0 )
Port

Definition at line 60 of file sramif2migui_core.vhd.

◆ APP_WDF_END

APP_WDF_END out slbit
Port

Definition at line 61 of file sramif2migui_core.vhd.

◆ APP_RD_DATA_VALID

APP_RD_DATA_VALID in slbit
Port

Definition at line 62 of file sramif2migui_core.vhd.

◆ APP_RD_DATA

APP_RD_DATA in slv ( 8 * ( 2 ** BAWIDTH ) - 1 downto 0 )
Port

Definition at line 63 of file sramif2migui_core.vhd.

◆ APP_RD_DATA_END

APP_RD_DATA_END in slbit
Port

Definition at line 65 of file sramif2migui_core.vhd.

◆ ieee

ieee
Library

Definition at line 22 of file sramif2migui_core.vhd.

◆ std_logic_1164

std_logic_1164
use clause

Definition at line 23 of file sramif2migui_core.vhd.

◆ numeric_std

numeric_std
use clause

Definition at line 24 of file sramif2migui_core.vhd.

◆ slvtypes

slvtypes
use clause

Definition at line 26 of file sramif2migui_core.vhd.

◆ memlib

memlib
use clause

Definition at line 27 of file sramif2migui_core.vhd.

◆ cdclib

cdclib
use clause

Definition at line 28 of file sramif2migui_core.vhd.

◆ miglib

miglib
use clause

Definition at line 29 of file sramif2migui_core.vhd.

The documentation for this design unit was generated from the following file: