1: /*	@(#)if_qe.c	1.3 (2.11BSD) 1997/2/16 */
   2: 
   3: /****************************************************************
   4:  *								*
   5:  *        Licensed from Digital Equipment Corporation 		*
   6:  *                       Copyright (c) 				*
   7:  *               Digital Equipment Corporation			*
   8:  *                   Maynard, Massachusetts 			*
   9:  *                         1985, 1986 				*
  10:  *                    All rights reserved. 			*
  11:  *								*
  12:  *        The Information in this software is subject to change *
  13:  *   without notice and should not be construed as a commitment *
  14:  *   by  Digital  Equipment  Corporation.   Digital   makes  no *
  15:  *   representations about the suitability of this software for *
  16:  *   any purpose.  It is supplied "As Is" without expressed  or *
  17:  *   implied  warranty. 					*
  18:  *								*
  19:  *        If the Regents of the University of California or its *
  20:  *   licensees modify the software in a manner creating  	*
  21:  *   derivative copyright rights, appropriate copyright  	*
  22:  *   legends may be placed on the derivative work in addition   *
  23:  *   to that set forth above. 					*
  24:  *								*
  25:  ****************************************************************/
  26: /* ---------------------------------------------------------------------
  27:  * Modification History
  28:  *
  29:  * 16-Nov-90 -- sms@wlv.imsd.contel.com
  30:  *	Ported from 4.3BSD to 2.11BSD as a replacement for the previous
  31:  *	2.10BSD deqna driver which was flakey.  'trailers' are completely
  32:  *	removed from this version - they are a bad idea and never really
  33:  *	worked.  Advantage is taken of this being a Qbus driver - memory
  34:  *	is allocated from the system and physical addresses computed.
  35:  *
  36:  * 15-Apr-86  -- afd
  37:  *	Rename "unused_multi" to "qunused_multi" for extending Generic
  38:  *	kernel to MicroVAXen.
  39:  *
  40:  * 18-mar-86  -- jaw     br/cvec changed to NOT use registers.
  41:  *
  42:  * 12 March 86 -- Jeff Chase
  43:  *	Modified to handle the new MCLGET macro
  44:  *	Changed if_qe_data.c to use more receive buffers
  45:  *	Added a flag to poke with adb to log qe_restarts on console
  46:  *
  47:  * 19 Oct 85 -- rjl
  48:  *	Changed the watch dog timer from 30 seconds to 3.  VMS is using
  49:  * 	less than 1 second in their's. Also turned the printf into an
  50:  *	mprintf.
  51:  *
  52:  *  09/16/85 -- Larry Cohen
  53:  * 		Add 43bsd alpha tape changes for subnet routing
  54:  *
  55:  *  1 Aug 85 -- rjl
  56:  *	Panic on a non-existent memory interrupt and the case where a packet
  57:  *	was chained.  The first should never happen because non-existant
  58:  *	memory interrupts cause a bus reset. The second should never happen
  59:  *	because we hang 2k input buffers on the device.
  60:  *
  61:  *  1 Aug 85 -- rich
  62:  *      Fixed the broadcast loopback code to handle Clusters without
  63:  *      wedging the system.
  64:  *
  65:  *  27 Feb. 85 -- ejf
  66:  *	Return default hardware address on ioctl request.
  67:  *
  68:  *  12 Feb. 85 -- ejf
  69:  *	Added internal extended loopback capability.
  70:  *
  71:  *  27 Dec. 84 -- rjl
  72:  *	Fixed bug that caused every other transmit descriptor to be used
  73:  *	instead of every descriptor.
  74:  *
  75:  *  21 Dec. 84 -- rjl
  76:  *	Added watchdog timer to mask hardware bug that causes device lockup.
  77:  *
  78:  *  18 Dec. 84 -- rjl
  79:  *	Reworked driver to use q-bus mapping routines.  MicroVAX-I now does
  80:  *	copying instead of m-buf shuffleing.
  81:  *	A number of deficencies in the hardware/firmware were compensated
  82:  *	for. See comments in qestart and qerint.
  83:  *
  84:  *  14 Nov. 84 -- jf
  85:  *	Added usage counts for multicast addresses.
  86:  *	Updated general protocol support to allow access to the Ethernet
  87:  *	header.
  88:  *
  89:  *  04 Oct. 84 -- jf
  90:  *	Added support for new ioctls to add and delete multicast addresses
  91:  *	and set the physical address.
  92:  *	Add support for general protocols.
  93:  *
  94:  *  14 Aug. 84 -- rjl
  95:  *	Integrated Shannon changes. (allow arp above 1024 and ? )
  96:  *
  97:  *  13 Feb. 84 -- rjl
  98:  *
  99:  *	Initial version of driver. derived from IL driver.
 100:  * ---------------------------------------------------------------------
 101:  */
 102: 
 103: #include "qe.h"
 104: #if NQE > 0
 105: /*
 106:  * Digital Q-BUS to NI Adapter
 107:  */
 108: 
 109: #include "param.h"
 110: #include "pdp/seg.h"
 111: #include "pdp/psl.h"
 112: #include "map.h"
 113: #include "systm.h"
 114: #include "mbuf.h"
 115: #include "buf.h"
 116: #include "protosw.h"
 117: #include "socket.h"
 118: #include "ioctl.h"
 119: #include "errno.h"
 120: #include "syslog.h"
 121: #include "time.h"
 122: #include "kernel.h"
 123: 
 124: #include "../net/if.h"
 125: #include "../net/netisr.h"
 126: #include "../net/route.h"
 127: 
 128: #ifdef INET
 129: #include "domain.h"
 130: #include "../netinet/in.h"
 131: #include "../netinet/in_systm.h"
 132: #include "../netinet/in_var.h"
 133: #include "../netinet/ip.h"
 134: #include "../netinet/if_ether.h"
 135: #endif
 136: 
 137: #ifdef NS
 138: #include "../netns/ns.h"
 139: #include "../netns/ns_if.h"
 140: #endif
 141: 
 142: #include "if_qereg.h"
 143: #include "if_uba.h"
 144: #include "../pdpuba/ubavar.h"
 145: 
 146: #define NRCV    13          /* Receive descriptors (was 25) */
 147: #define NXMT    5           /* Transmit descriptors		*/
 148: #define NTOT    (NXMT + NRCV)
 149: 
 150: #define MINDATA 60
 151: 
 152: /*
 153:  * Ethernet software status per interface.
 154:  *
 155:  * Each interface is referenced by a network interface structure,
 156:  * is_if, which the routing code uses to locate the interface.
 157:  * This structure contains the output queue for the interface, its address, ...
 158:  */
 159: struct  qe_softc {
 160:     struct  arpcom is_ac;       /* Ethernet common part 	*/
 161: #define is_if   is_ac.ac_if     /* network-visible interface 	*/
 162: #define is_addr is_ac.ac_enaddr     /* hardware Ethernet address 	*/
 163:     struct  ifuba qe_ifr[NRCV]; /*	for receive buffers;	*/
 164:     struct  ifuba qe_ifw[NXMT]; /*	for xmit buffers;	*/
 165:     int qe_flags;       /* software state		*/
 166: #define QEF_RUNNING 0x01
 167: #define QEF_SETADDR 0x02
 168:     long    setupaddr;      /* physaddr info for setup pkts  */
 169:     long    rringaddr;      /* physaddr info for rings	*/
 170:     long    tringaddr;      /*       ""			*/
 171:     struct  qe_ring rring[NRCV+1];  /* Receive ring descriptors 	*/
 172:     struct  qe_ring tring[NXMT+1];  /* Transmit ring descriptors 	*/
 173:     u_char  setup_pkt[16][8];   /* Setup packet			*/
 174:     u_char  rindex;         /* Receive index		*/
 175:     u_char  tindex;         /* Transmit index		*/
 176:     int otindex;        /* Old transmit index		*/
 177:     int qe_intvec;      /* Interrupt vector 		*/
 178:     struct  qedevice *addr;     /* device addr			*/
 179:     u_char  setupqueued;        /* setup packet queued		*/
 180:     u_char  nxmit;          /* Transmits in progress	*/
 181:     int timeout;        /* watchdog			*/
 182:     int qe_restarts;        /* timeouts			*/
 183: } qe_softc[NQE];
 184: 
 185: struct  uba_device *qeinfo[NQE];
 186: 
 187: int qeattach(), qeintr(), qewatch(), qeinit(),qeoutput(),qeioctl();
 188: 
 189: extern struct ifnet loif;
 190: u_short qestd[] = { 0 };
 191: struct  uba_driver qedriver =
 192:     { 0, 0, qeattach, 0, qestd, "qe", qeinfo };
 193: 
 194: #define QE_TIMEO    (15)
 195: #define QEUNIT(x)   minor(x)
 196: int watchrun = 0;           /* watchdog running	*/
 197: /*
 198:  * The deqna shouldn't receive more than ETHERMTU + sizeof(struct ether_header)
 199:  * but will actually take in up to 2048 bytes. To guard against the receiver
 200:  * chaining buffers (which we aren't prepared to handle) we allocate 2kb
 201:  * size buffers.
 202:  */
 203: #define MAXPACKETSIZE 2048      /* Should really be ETHERMTU	*/
 204: 
 205: /*
 206:  * The C compiler's propensity for prepending '_'s to names is the reason
 207:  * for the routine below.  We need the "handler" address (the code which
 208:  * sets up the interrupt stack frame) in order to initialize the vector.
 209: */
 210: 
 211: static int qefoo()
 212:     {
 213:     asm("mov $qeintr, r0");     /* return value is in r0 */
 214:     }
 215: 
 216: /*
 217:  * Interface exists: make available by filling in network interface
 218:  * record.  System will initialize the interface when it is ready
 219:  * to accept packets.
 220:  */
 221: qeattach(ui)
 222:     struct uba_device *ui;
 223: {
 224:     register struct qe_softc *sc = &qe_softc[ui->ui_unit];
 225:     register struct ifnet *ifp = &sc->is_if;
 226:     struct qedevice *addr = (struct qedevice *)ui->ui_addr;
 227:     register int i;
 228:     int islqa = 0;
 229:     extern int nextiv();
 230: 
 231:     ifp->if_unit = ui->ui_unit;
 232:     ifp->if_name = "qe";
 233:     ifp->if_mtu = ETHERMTU;
 234:     ifp->if_flags = IFF_BROADCAST;
 235: 
 236:     /*
 237: 	 * Read the address from the prom and save it.
 238: 	 */
 239:     for ( i=0 ; i<6 ; i++ )
 240:         sc->setup_pkt[i][1] = sc->is_addr[i] = addr->qe_sta_addr[i] & 0xff;
 241:     /*
 242:  	 * Determine if this is a DEQNA or a DELQA...
 243: 	*/
 244:     addr->qe_vector |= QE_VEC_ID;
 245:     if  (addr->qe_vector & QE_VEC_ID)
 246:         islqa = 1;
 247:     addr->qe_vector &= ~QE_VEC_ID;
 248: 
 249:     /*
 250: 	 * Allocate a floating vector and initialize it with the address of
 251: 	 * the interrupt handler and PSW (supervisor mode, priority 4, unit
 252: 	 * number in the low bits.
 253: 	 */
 254:     i = SKcall(nextiv, 0);
 255:     sc->qe_intvec = i;
 256:     mtkd(i, qefoo());
 257:     mtkd(i+2, PSL_CURSUP | PSL_BR4 | ifp->if_unit);
 258: 
 259:     /*
 260: 	 * map the communications area onto the device
 261: 	 */
 262:     sc->rringaddr = startnet + (long)sc->rring;
 263:     sc->tringaddr = startnet + (long)sc->tring;
 264:     sc->setupaddr = startnet + (long)sc->setup_pkt;
 265: 
 266:     /*
 267: 	 * init buffers and maps
 268: 	 */
 269:     if (qbaini(sc->qe_ifr, NRCV) == 0)
 270:         sc->is_if.if_flags &= ~IFF_UP;
 271:     if (qbaini(sc->qe_ifw, NXMT) == 0)
 272:         sc->is_if.if_flags &= ~IFF_UP;
 273: 
 274:     ifp->if_init = qeinit;
 275:     ifp->if_output = qeoutput;
 276:     ifp->if_ioctl = qeioctl;
 277:     ifp->if_reset = 0;
 278:     if_attach(ifp);
 279: 
 280:     printf("qe%d: DEC DE%sA addr %s\n",ifp->if_unit, islqa ? "LQ": "QN",
 281:         ether_sprintf(&sc->is_addr));
 282: }
 283: 
 284: /*
 285:  * Initialization of interface.
 286:  */
 287: qeinit(unit)
 288:     int unit;
 289: {
 290:     register struct qe_softc *sc = &qe_softc[unit];
 291:     register struct uba_device *ui = qeinfo[unit];
 292:     register struct qedevice *addr = (struct qedevice *)ui->ui_addr;
 293:     register struct ifnet *ifp = &sc->is_if;
 294:     register i;
 295:     int s;
 296: 
 297:     /* address not known */
 298:     if (ifp->if_addrlist == (struct ifaddr *)0)
 299:             return;
 300:     /*
 301: 	 * Init the buffer descriptors and indexes for each of the lists and
 302: 	 * loop them back to form a ring.
 303: 	 */
 304:     for (i = 0; i < NRCV; i++) {
 305:         qeinitdesc(&sc->rring[i],
 306:             sc->qe_ifr[i].ifu_r.ifrw_info, MAXPACKETSIZE);
 307:         sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET;
 308:         sc->rring[i].qe_valid = 1;
 309:     }
 310:     qeinitdesc(&sc->rring[i], (long)NULL, 0);
 311: 
 312:     sc->rring[i].qe_addr_lo = loint(sc->rringaddr);
 313:     sc->rring[i].qe_addr_hi = hiint(sc->rringaddr);
 314:     sc->rring[i].qe_chain = 1;
 315:     sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET;
 316:     sc->rring[i].qe_valid = 1;
 317: 
 318:     for( i = 0 ; i <= NXMT ; i++ )
 319:         qeinitdesc(&sc->tring[i], (long)NULL, 0);
 320:     i--;
 321: 
 322:     sc->tring[i].qe_addr_lo = loint(sc->tringaddr);
 323:     sc->tring[i].qe_addr_hi = hiint(sc->tringaddr);
 324:     sc->tring[i].qe_chain = 1;
 325:     sc->tring[i].qe_flag = sc->tring[i].qe_status1 = QE_NOTYET;
 326:     sc->tring[i].qe_valid = 1;
 327: 
 328:     sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0;
 329: 
 330:     /*
 331: 	 * Take the interface out of reset, program the vector,
 332: 	 * enable interrupts, and tell the world we are up.
 333: 	 */
 334:     s = splimp();
 335:     addr->qe_vector = sc->qe_intvec;
 336:     sc->addr = addr;
 337:     addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT |
 338:         QE_RCV_INT | QE_ILOOP;
 339:     addr->qe_rcvlist_lo = loint(sc->rringaddr);
 340:     addr->qe_rcvlist_hi = hiint(sc->rringaddr);
 341:     ifp->if_flags |= IFF_UP | IFF_RUNNING;
 342:     sc->qe_flags |= QEF_RUNNING;
 343:     qesetup(sc);
 344:     qestart(unit);
 345:     splx(s);
 346: 
 347: }
 348: 
 349: /*
 350:  * Start output on interface.
 351:  *
 352:  */
 353: qestart(dev)
 354:     dev_t dev;
 355: {
 356:     int unit = QEUNIT(dev);
 357:     struct uba_device *ui = qeinfo[unit];
 358:     register struct qe_softc *sc = &qe_softc[unit];
 359:     register struct qedevice *addr;
 360:     register struct qe_ring *rp;
 361:     register index;
 362:     struct mbuf *m;
 363:     int len, s;
 364:     long buf_addr;
 365: 
 366: 
 367:     s = splimp();
 368:     addr = (struct qedevice *)ui->ui_addr;
 369:     /*
 370: 	 * The deqna doesn't look at anything but the valid bit
 371: 	 * to determine if it should transmit this packet. If you have
 372: 	 * a ring and fill it the device will loop indefinately on the
 373: 	 * packet and continue to flood the net with packets until you
 374: 	 * break the ring. For this reason we never queue more than n-1
 375: 	 * packets in the transmit ring.
 376: 	 *
 377: 	 * The microcoders should have obeyed their own defination of the
 378: 	 * flag and status words, but instead we have to compensate.
 379: 	 */
 380:     for( index = sc->tindex;
 381:         sc->tring[index].qe_valid == 0 && sc->nxmit < (NXMT-1) ;
 382:         sc->tindex = index = ++index % NXMT){
 383:         rp = &sc->tring[index];
 384:         if( sc->setupqueued ) {
 385:             buf_addr = sc->setupaddr;
 386:             len = 128;
 387:             rp->qe_setup = 1;
 388:             sc->setupqueued = 0;
 389:         } else {
 390:             IF_DEQUEUE(&sc->is_if.if_snd, m);
 391:             if( m == 0 ){
 392:                 splx(s);
 393:                 return;
 394:             }
 395:             buf_addr = sc->qe_ifw[index].ifu_w.ifrw_info;
 396:             len = if_wubaput(&sc->qe_ifw[index], m);
 397:         }
 398:         /*
 399: 		 *  Does buffer end on odd byte ?
 400: 		 */
 401:         if (len < MINDATA)
 402:             len = MINDATA;
 403:         if (len & 1) {
 404:             len++;
 405:             rp->qe_odd_end = 1;
 406:         }
 407:         rp->qe_buf_len = -(len/2);
 408:         rp->qe_flag = rp->qe_status1 = QE_NOTYET;
 409:         rp->qe_addr_lo = loint(buf_addr);
 410:         rp->qe_addr_hi = hiint(buf_addr);
 411:         rp->qe_eomsg = 1;
 412:         rp->qe_flag = rp->qe_status1 = QE_NOTYET;
 413:         rp->qe_valid = 1;
 414:         sc->nxmit++;
 415:         /*
 416: 		 * If the watchdog time isn't running kick it.
 417: 		 */
 418:         sc->timeout=1;
 419:         if (watchrun == 0) {
 420:             watchrun++;
 421:             TIMEOUT(qewatch, (caddr_t)0, QE_TIMEO);
 422:         }
 423: 
 424:         /*
 425: 		 * See if the xmit list is invalid.
 426: 		 */
 427:         if( addr->qe_csr & QE_XL_INVALID ) {
 428:             buf_addr = sc->tringaddr + (index * sizeof (struct qe_ring));
 429:             addr->qe_xmtlist_lo = loint(buf_addr);
 430:             addr->qe_xmtlist_hi = hiint(buf_addr);
 431:         }
 432:     }
 433:     splx(s);
 434: }
 435: 
 436: /*
 437:  * Ethernet interface interrupt processor
 438:  */
 439: qeintr(unit)
 440:     int unit;
 441: {
 442:     register struct qe_softc *sc = &qe_softc[unit];
 443:     struct qedevice *addr = (struct qedevice *)qeinfo[unit]->ui_addr;
 444:     int s, csr;
 445:     long buf_addr;
 446: 
 447:     s = splimp();
 448:     csr = addr->qe_csr;
 449:     addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT | QE_ILOOP;
 450:     if (csr & QE_RCV_INT)
 451:         qerint(unit);
 452:     if (csr & QE_XMIT_INT)
 453:         qetint(unit);
 454:     if (csr & QE_NEX_MEM_INT)
 455:         panic("qe: Non existant memory interrupt");
 456: 
 457:     if( addr->qe_csr & QE_RL_INVALID && sc->rring[sc->rindex].qe_status1 == QE_NOTYET ) {
 458:         buf_addr = sc->rringaddr + (sc->rindex * sizeof(struct qe_ring));
 459:         addr->qe_rcvlist_lo = loint(buf_addr);
 460:         addr->qe_rcvlist_hi = hiint(buf_addr);
 461:     }
 462:     splx(s);
 463: }
 464: 
 465: /*
 466:  * Ethernet interface transmit interrupt.
 467:  */
 468: 
 469: qetint(unit)
 470:     int unit;
 471: {
 472:     register struct qe_softc *sc = &qe_softc[unit];
 473:     register struct qe_ring *rp;
 474:     int status1, setupflag;
 475:     short len;
 476: 
 477:     while (sc->otindex != sc->tindex && sc->tring[sc->otindex].qe_status1 != QE_NOTYET && sc->nxmit > 0) {
 478:         /*
 479: 		 * Save the status words from the descriptor so that it can
 480: 		 * be released.
 481: 		 */
 482:         rp = &sc->tring[sc->otindex];
 483:         status1 = rp->qe_status1;
 484:         setupflag = rp->qe_setup;
 485:         len = (-rp->qe_buf_len) * 2;
 486:         if (rp->qe_odd_end)
 487:             len++;
 488:         /*
 489: 		 * Init the buffer descriptor
 490: 		 */
 491:         bzero((caddr_t)rp, sizeof(struct qe_ring));
 492:         if (--sc->nxmit == 0)
 493:             sc->timeout = 0;
 494:         if (!setupflag) {
 495:             /*
 496: 			 * Do some statistics.
 497: 			 */
 498:             sc->is_if.if_opackets++;
 499:             sc->is_if.if_collisions += (status1 & QE_CCNT) >> 4;
 500:             if (status1 & QE_ERROR)
 501:                 sc->is_if.if_oerrors++;
 502:         }
 503:         sc->otindex = ++sc->otindex % NXMT;
 504:     }
 505:     qestart(unit);
 506: }
 507: 
 508: /*
 509:  * Ethernet interface receiver interrupt.
 510:  * If can't determine length from type, then have to drop packet.
 511:  * Othewise decapsulate packet based on type and pass to type specific
 512:  * higher-level input routine.
 513:  */
 514: qerint(unit)
 515:     int unit;
 516: {
 517:     register struct qe_softc *sc = &qe_softc[unit];
 518:     register struct qe_ring *rp;
 519:     int len, status1, status2;
 520:     long bufaddr;
 521: 
 522:     /*
 523: 	 * Traverse the receive ring looking for packets to pass back.
 524: 	 * The search is complete when we find a descriptor not in use.
 525: 	 *
 526: 	 * As in the transmit case the deqna doesn't honor it's own protocols
 527: 	 * so there exists the possibility that the device can beat us around
 528: 	 * the ring. The proper way to guard against this is to insure that
 529: 	 * there is always at least one invalid descriptor. We chose instead
 530: 	 * to make the ring large enough to minimize the problem. With a ring
 531: 	 * size of 4 we haven't been able to see the problem. To be safe we
 532: 	 * increased that to 5.
 533: 	 *
 534: 	 */
 535: 
 536:     for( ; sc->rring[sc->rindex].qe_status1 != QE_NOTYET ; sc->rindex = ++sc->rindex % NRCV ){
 537:         rp = &sc->rring[sc->rindex];
 538:         status1 = rp->qe_status1;
 539:         status2 = rp->qe_status2;
 540:         bzero((caddr_t)rp, sizeof(struct qe_ring));
 541:         if ((status1 & QE_MASK) == QE_MASK)
 542:             panic("qe: chained packet");
 543:         len = ((status1 & QE_RBL_HI) | (status2 & QE_RBL_LO)) + 60;
 544:         sc->is_if.if_ipackets++;
 545: 
 546:         if (status1 & QE_ERROR)
 547:             sc->is_if.if_ierrors++;
 548:         else {
 549:             /*
 550: 			 * We don't process setup packets.
 551: 			 */
 552:             if (!(status1 & QE_ESETUP))
 553:                 qeread(sc, &sc->qe_ifr[sc->rindex],
 554:                     len - sizeof(struct ether_header));
 555:         }
 556:         /*
 557: 		 * Return the buffer to the ring
 558: 		 */
 559:         bufaddr = sc->qe_ifr[sc->rindex].ifu_r.ifrw_info;
 560:         rp->qe_buf_len = -((MAXPACKETSIZE)/2);
 561:         rp->qe_addr_lo = loint(bufaddr);
 562:         rp->qe_addr_hi = hiint(bufaddr);
 563:         rp->qe_flag = rp->qe_status1 = QE_NOTYET;
 564:         rp->qe_valid = 1;
 565:     }
 566: }
 567: 
 568: /*
 569:  * Ethernet output routine.
 570:  * Encapsulate a packet of type family for the local net.
 571:  */
 572: qeoutput(ifp, m0, dst)
 573:     struct ifnet *ifp;
 574:     struct mbuf *m0;
 575:     struct sockaddr *dst;
 576: {
 577:     int type, s, error;
 578:     u_char edst[6];
 579:     struct in_addr idst;
 580:     register struct qe_softc *is = &qe_softc[ifp->if_unit];
 581:     register struct mbuf *m = m0;
 582:     register struct ether_header *eh;
 583:     int usetrailers;
 584:     struct mbuf *mcopy = (struct mbuf *)0;
 585: 
 586:     if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) != (IFF_UP|IFF_RUNNING)) {
 587:         error = ENETDOWN;
 588:         goto bad;
 589:     }
 590: 
 591:     switch (dst->sa_family) {
 592: 
 593: #ifdef INET
 594:     case AF_INET:
 595:         idst = ((struct sockaddr_in *)dst)->sin_addr;
 596:         if (!arpresolve(&is->is_ac, m, &idst, edst, &usetrailers))
 597:             return (0); /* if not yet resolved */
 598:         if (!bcmp(edst, etherbroadcastaddr,sizeof (edst)))
 599:             mcopy = m_copy(m, 0, (int)M_COPYALL);
 600:         type = ETHERTYPE_IP;
 601:         goto gottype;
 602: #endif
 603: #ifdef NS
 604:     case AF_NS:
 605:         type = ETHERTYPE_NS;
 606:         bcopy((caddr_t)&(((struct sockaddr_ns *)dst)->sns_addr.x_host),
 607:             (caddr_t)edst, sizeof (edst));
 608:         if (!bcmp(edst, &ns_broadcast, sizeof (edst)))
 609:             return(looutput(&loif, m, dst));
 610:         goto gottype;
 611: #endif
 612: 
 613: 
 614:     case AF_UNSPEC:
 615:         eh = (struct ether_header *)dst->sa_data;
 616:         bcopy((caddr_t)eh->ether_dhost, (caddr_t)edst, sizeof (edst));
 617:         type = eh->ether_type;
 618:         goto gottype;
 619: 
 620:     default:
 621:         printf("qe%d: can't handle af%d\n", ifp->if_unit,
 622:             dst->sa_family);
 623:         error = EAFNOSUPPORT;
 624:         goto bad;
 625:     }
 626: 
 627: gottype:
 628:     /*
 629: 	 * Add local net header.  If no space in first mbuf,
 630: 	 * allocate another.
 631: 	 */
 632:     if (m->m_off > MMAXOFF ||
 633:         MMINOFF + sizeof (struct ether_header) > m->m_off) {
 634:         m = m_get(M_DONTWAIT, MT_HEADER);
 635:         if (m == 0) {
 636:             error = ENOBUFS;
 637:             goto bad;
 638:         }
 639:         m->m_next = m0;
 640:         m->m_off = MMINOFF;
 641:         m->m_len = sizeof (struct ether_header);
 642:     } else {
 643:         m->m_off -= sizeof (struct ether_header);
 644:         m->m_len += sizeof (struct ether_header);
 645:     }
 646:     eh = mtod(m, struct ether_header *);
 647:     eh->ether_type = htons((u_short)type);
 648:     bcopy((caddr_t)edst, (caddr_t)eh->ether_dhost, sizeof (edst));
 649:     bcopy((caddr_t)is->is_addr, (caddr_t)eh->ether_shost, sizeof (is->is_addr));
 650: 
 651:     /*
 652: 	 * Queue message on interface, and start output if interface
 653: 	 * not yet active.
 654: 	 */
 655:     s = splimp();
 656:     if (IF_QFULL(&ifp->if_snd)) {
 657:         IF_DROP(&ifp->if_snd);
 658:         splx(s);
 659:         m_freem(m);
 660:         if (mcopy)
 661:             m_freem(mcopy);
 662:         return (ENOBUFS);
 663:     }
 664:     IF_ENQUEUE(&ifp->if_snd, m);
 665:     qestart(ifp->if_unit);
 666:     splx(s);
 667:     return(mcopy ? looutput(&loif, mcopy, dst) : 0);
 668: 
 669: bad:
 670:     m_freem(m0);
 671:     if (mcopy)
 672:         m_freem(mcopy);
 673:     return(error);
 674: }
 675: 
 676: 
 677: /*
 678:  * Process an ioctl request.
 679:  */
 680: qeioctl(ifp, cmd, data)
 681:     register struct ifnet *ifp;
 682:     int cmd;
 683:     caddr_t data;
 684: {
 685:     struct qe_softc *sc = &qe_softc[ifp->if_unit];
 686:     struct ifaddr *ifa = (struct ifaddr *)data;
 687:     int s = splimp(), error = 0;
 688: 
 689:     switch (cmd) {
 690: 
 691:     case SIOCSIFADDR:
 692:         ifp->if_flags |= IFF_UP;
 693:         qeinit(ifp->if_unit);
 694:         switch(ifa->ifa_addr.sa_family) {
 695: #ifdef INET
 696:         case AF_INET:
 697:             ((struct arpcom *)ifp)->ac_ipaddr =
 698:                 IA_SIN(ifa)->sin_addr;
 699:             arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr);
 700:             break;
 701: #endif
 702: #ifdef NS
 703:         case AF_NS:
 704:             {
 705:             register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
 706: 
 707:             if (ns_nullhost(*ina))
 708:                 ina->x_host = *(union ns_host *)(sc->is_addr);
 709:             else
 710:                 qe_setaddr(ina->x_host.c_host, ifp->if_unit);
 711:             break;
 712:             }
 713: #endif
 714:         }
 715:         break;
 716: 
 717:     case SIOCSIFFLAGS:
 718:         if ((ifp->if_flags & IFF_UP) == 0 &&
 719:             sc->qe_flags & QEF_RUNNING) {
 720:             ((struct qedevice *)
 721:                (qeinfo[ifp->if_unit]->ui_addr))->qe_csr = QE_RESET;
 722:             sc->qe_flags &= ~QEF_RUNNING;
 723:         } else if (ifp->if_flags & IFF_UP &&
 724:             (sc->qe_flags & QEF_RUNNING) == 0)
 725:             qerestart(sc);
 726:         break;
 727: 
 728:     default:
 729:         error = EINVAL;
 730: 
 731:     }
 732:     splx(s);
 733:     return (error);
 734: }
 735: 
 736: /*
 737:  * set ethernet address for unit
 738:  */
 739: qe_setaddr(physaddr, unit)
 740:     u_char *physaddr;
 741:     int unit;
 742: {
 743:     register struct qe_softc *sc = &qe_softc[unit];
 744:     register int i;
 745: 
 746:     for (i = 0; i < 6; i++)
 747:         sc->setup_pkt[i][1] = sc->is_addr[i] = physaddr[i];
 748:     sc->qe_flags |= QEF_SETADDR;
 749:     if (sc->is_if.if_flags & IFF_RUNNING)
 750:         qesetup(sc);
 751:     qeinit(unit);
 752: }
 753: 
 754: 
 755: /*
 756:  * Initialize a ring descriptor with mbuf allocation side effects
 757:  */
 758: qeinitdesc(rp, addr, len)
 759:     register struct qe_ring *rp;
 760:     long addr;          /* physical address */
 761:     int len;
 762: {
 763:     /*
 764: 	 * clear the entire descriptor
 765: 	 */
 766:     bzero((caddr_t)rp, sizeof(struct qe_ring));
 767: 
 768:     if( len ) {
 769:         rp->qe_buf_len = -(len/2);
 770:         rp->qe_addr_lo = loint(addr);
 771:         rp->qe_addr_hi = hiint(addr);
 772:     }
 773: }
 774: /*
 775:  * Build a setup packet - the physical address will already be present
 776:  * in first column.
 777:  */
 778: qesetup( sc )
 779: struct qe_softc *sc;
 780: {
 781:     register i, j;
 782: 
 783:     /*
 784: 	 * Copy the target address to the rest of the entries in this row.
 785: 	 */
 786:      for ( j = 0; j < 6 ; j++ )
 787:         for ( i = 2 ; i < 8 ; i++ )
 788:             sc->setup_pkt[j][i] = sc->setup_pkt[j][1];
 789:     /*
 790: 	 * Duplicate the first half.
 791: 	 */
 792:     bcopy((caddr_t)sc->setup_pkt[0], (caddr_t)sc->setup_pkt[8], 64);
 793:     /*
 794: 	 * Fill in the broadcast address.
 795: 	 */
 796:     for ( i = 0; i < 6 ; i++ )
 797:         sc->setup_pkt[i][2] = 0xff;
 798:     sc->setupqueued++;
 799: }
 800: 
 801: /*
 802:  * Pass a packet to the higher levels.
 803:  */
 804: qeread(sc, ifuba, len)
 805:     register struct qe_softc *sc;
 806:     struct ifuba *ifuba;
 807:     int len;
 808: {
 809:     struct ether_header *eh;
 810:         struct mbuf *m;
 811:     struct ifqueue *inq;
 812:     register int type;
 813:     segm seg5;
 814: 
 815:     /*
 816: 	 * Count trailers as errors and drop the packet.
 817: 	 * SEG5 is mapped out briefly to peek at the packet type, swap the
 818: 	 * bytes and then SEG5 is restored.
 819: 	 */
 820: 
 821:     saveseg5(seg5);
 822:     mapseg5(ifuba->ifu_r.ifrw_click, 077406);   /* 8k r/w for 1 word */
 823:     eh = (struct ether_header *)SEG5;
 824:     eh->ether_type = ntohs((u_short)eh->ether_type);
 825:     type = eh->ether_type;
 826:     restorseg5(seg5);
 827:     if (len == 0 || type >= ETHERTYPE_TRAIL &&
 828:         type < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) {
 829:         sc->is_if.if_ierrors++;
 830:         return;
 831:     }
 832: 
 833:     /*
 834: 	 * Pull packet off interface.
 835: 	 */
 836:     m = if_rubaget(ifuba, len, 0, &sc->is_if);
 837: 
 838:     if (m == 0)
 839:         return;
 840: 
 841:     switch (type) {
 842: 
 843: #ifdef INET
 844:     case ETHERTYPE_IP:
 845:         schednetisr(NETISR_IP);
 846:         inq = &ipintrq;
 847:         break;
 848: 
 849:     case ETHERTYPE_ARP:
 850:         arpinput(&sc->is_ac, m);
 851:         return;
 852: #endif
 853: #ifdef NS
 854:     case ETHERTYPE_NS:
 855:         schednetisr(NETISR_NS);
 856:         inq = &nsintrq;
 857:         break;
 858: 
 859: #endif
 860: 
 861:     default:
 862:         m_freem(m);
 863:         return;
 864:     }
 865: 
 866:     if (IF_QFULL(inq)) {
 867:         IF_DROP(inq);
 868:         m_freem(m);
 869:         return;
 870:     }
 871:     IF_ENQUEUE(inq, m);
 872: }
 873: 
 874: /*
 875:  * Watchdog timer routine. There is a condition in the hardware that
 876:  * causes the board to lock up under heavy load. This routine detects
 877:  * the hang up and restarts the device.
 878:  */
 879: qewatch()
 880: {
 881:     register struct qe_softc *sc;
 882:     register int i;
 883:     int inprogress=0;
 884: 
 885:     for (i = 0; i < NQE; i++) {
 886:         sc = &qe_softc[i];
 887:         if (sc->timeout)
 888:             if (++sc->timeout > 3 ) {
 889:                 printf("qerestart: restarted qe%d %d\n",
 890:                      i, ++sc->qe_restarts);
 891:                 qerestart(sc);
 892:             } else
 893:                 inprogress++;
 894:     }
 895:     if (inprogress) {
 896:         TIMEOUT(qewatch, (caddr_t)0, QE_TIMEO);
 897:         watchrun++;
 898:     } else
 899:         watchrun=0;
 900: }
 901: /*
 902:  * Restart for board lockup problem.
 903:  */
 904: qerestart(sc)
 905:     register struct qe_softc *sc;
 906: {
 907:     register struct ifnet *ifp = &sc->is_if;
 908:     register struct qedevice *addr = sc->addr;
 909:     register struct qe_ring *rp;
 910:     register i;
 911: 
 912:     addr->qe_csr = QE_RESET;
 913:     addr->qe_csr &= ~QE_RESET;
 914:     sc->timeout = 0;
 915:     qesetup( sc );
 916:     for (i = 0, rp = sc->tring; i < NXMT; rp++, i++) {
 917:         rp->qe_flag = rp->qe_status1 = QE_NOTYET;
 918:         rp->qe_valid = 0;
 919:     }
 920:     sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0;
 921:     addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT |
 922:         QE_RCV_INT | QE_ILOOP;
 923:     addr->qe_rcvlist_lo = loint(sc->rringaddr);
 924:     addr->qe_rcvlist_hi = hiint(sc->rringaddr);
 925:     sc->qe_flags |= QEF_RUNNING;
 926:     qestart(ifp->if_unit);
 927: }
 928: 
 929: qbaini(ifuba, num)
 930:     struct ifuba *ifuba;
 931:     int num;
 932: {
 933:     register int i;
 934:     register memaddr click;
 935: 
 936:     for (i = 0; i < num; i++) {
 937:         click = m_ioget(MAXPACKETSIZE);
 938:         if (click == 0) {
 939:             click = MALLOC(coremap, btoc(MAXPACKETSIZE));
 940:             if (click == 0) {
 941:                 printf("qe: can't get dma memory\n");
 942:                 return(0);
 943:             }
 944:         }
 945:         ifuba[i].ifu_hlen = sizeof (struct ether_header);
 946:         ifuba[i].ifu_w.ifrw_click = ifuba[i].ifu_r.ifrw_click = click;
 947:         ifuba[i].ifu_w.ifrw_info = ifuba[i].ifu_r.ifrw_info =
 948:             ctob((long)click);
 949:     }
 950:     return(1);
 951: }
 952: #endif

Defined functions

qbaini defined in line 929; used 2 times
qe_setaddr defined in line 739; used 1 times
qeattach defined in line 221; used 2 times
qefoo defined in line 211; used 1 times
qeinit defined in line 287; used 4 times
qeinitdesc defined in line 758; used 3 times
qeintr defined in line 439; used 1 times
qeioctl defined in line 680; used 2 times
qeoutput defined in line 572; used 2 times
qeread defined in line 804; used 1 times
qerestart defined in line 904; used 2 times
qerint defined in line 514; used 1 times
qesetup defined in line 778; used 3 times
qestart defined in line 353; used 4 times
qetint defined in line 469; used 1 times
qewatch defined in line 879; used 3 times

Defined variables

qe_softc defined in line 183; used 10 times
qedriver defined in line 191; never used
qeinfo defined in line 185; used 5 times
qestd defined in line 190; used 1 times
watchrun defined in line 196; used 4 times

Defined struct's

qe_softc defined in line 159; used 26 times

Defined macros

MAXPACKETSIZE defined in line 203; used 4 times
MINDATA defined in line 150; used 2 times
NRCV defined in line 146; used 6 times
NTOT defined in line 148; never used
NXMT defined in line 147; used 9 times
QEF_RUNNING defined in line 166; used 5 times
QEF_SETADDR defined in line 167; used 1 times
QEUNIT defined in line 195; used 1 times
QE_TIMEO defined in line 194; used 2 times
is_addr defined in line 162; used 6 times
is_if defined in line 161; used 14 times
Last modified: 1997-02-16
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