Release 14.7 Map P.20131013 (lin64)
Xilinx Mapping Report File for Design 'sys_w11a_n3'

Design Information
------------------
Command Line   : map -o sys_w11a_n3_map.ncd -intstyle xflow -ol high -xe n
-register_duplication on -w -mt 2 -detail sys_w11a_n3.ngd sys_w11a_n3.pcf 
Target Device  : xc6slx16
Target Package : csg324
Target Speed   : -2
Mapper Version : spartan6 -- $Revision: 1.55 $
Mapped Date    : Sat Mar 19 14:55:56 2016

Design Summary
--------------
Number of errors:      0
Number of warnings:    7
Slice Logic Utilization:
  Number of Slice Registers:                 2,568 out of  18,224   14%
    Number used as Flip Flops:               2,566
    Number used as Latches:                      0
    Number used as Latch-thrus:                  0
    Number used as AND/OR logics:                2
  Number of Slice LUTs:                      5,304 out of   9,112   58%
    Number used as logic:                    5,101 out of   9,112   55%
      Number using O6 output only:           3,946
      Number using O5 output only:              97
      Number using O5 and O6:                1,058
      Number used as ROM:                        0
    Number used as Memory:                     181 out of   2,176    8%
      Number used as Dual Port RAM:            116
        Number using O6 output only:             8
        Number using O5 output only:             0
        Number using O5 and O6:                108
      Number used as Single Port RAM:           65
        Number using O6 output only:            30
        Number using O5 output only:             2
        Number using O5 and O6:                 33
      Number used as Shift Register:             0
    Number used exclusively as route-thrus:     22
      Number with same-slice register load:     12
      Number with same-slice carry load:        10
      Number with other load:                    0

Slice Logic Distribution:
  Number of occupied Slices:                 1,818 out of   2,278   79%
  Number of MUXCYs used:                       560 out of   4,556   12%
  Number of LUT Flip Flop pairs used:        5,561
    Number with an unused Flip Flop:         3,181 out of   5,561   57%
    Number with an unused LUT:                 257 out of   5,561    4%
    Number of fully used LUT-FF pairs:       2,123 out of   5,561   38%
    Number of unique control sets:             360
    Number of slice register sites lost
      to control set restrictions:           1,472 out of  18,224    8%

  A LUT Flip Flop pair for this architecture represents one LUT paired with
  one Flip Flop within a slice.  A control set is a unique combination of
  clock, reset, set, and enable signals for a registered element.
  The Slice Logic Distribution report is not meaningful if the design is
  over-mapped for a non-slice resource or if Placement fails.

IO Utilization:
  Number of bonded IOBs:                       108 out of     232   46%
    Number of LOCed IOBs:                      108 out of     108  100%
    IOB Flip Flops:                            146

Specific Feature Utilization:
  Number of RAMB16BWERs:                        15 out of      32   46%
  Number of RAMB8BWERs:                          0 out of      64    0%
  Number of BUFIO2/BUFIO2_2CLKs:                 1 out of      32    3%
    Number used as BUFIO2s:                      1
    Number used as BUFIO2_2CLKs:                 0
  Number of BUFIO2FB/BUFIO2FB_2CLKs:             0 out of      32    0%
  Number of BUFG/BUFGMUXs:                       2 out of      16   12%
    Number used as BUFGs:                        2
    Number used as BUFGMUX:                      0
  Number of DCM/DCM_CLKGENs:                     1 out of       4   25%
    Number used as DCMs:                         1
    Number used as DCM_CLKGENs:                  0
  Number of ILOGIC2/ISERDES2s:                  43 out of     248   17%
    Number used as ILOGIC2s:                    43
    Number used as ISERDES2s:                    0
  Number of IODELAY2/IODRP2/IODRP2_MCBs:        11 out of     248    4%
    Number used as IODELAY2s:                   11
    Number used as IODRP2s:                      0
    Number used as IODRP2_MCBs:                  0
  Number of OLOGIC2/OSERDES2s:                  79 out of     248   31%
    Number used as OLOGIC2s:                    79
    Number used as OSERDES2s:                    0
  Number of BSCANs:                              0 out of       4    0%
  Number of BUFHs:                               0 out of     128    0%
  Number of BUFPLLs:                             0 out of       8    0%
  Number of BUFPLL_MCBs:                         0 out of       4    0%
  Number of DSP48A1s:                            1 out of      32    3%
  Number of ICAPs:                               0 out of       1    0%
  Number of MCBs:                                0 out of       2    0%
  Number of PCILOGICSEs:                         0 out of       2    0%
  Number of PLL_ADVs:                            0 out of       2    0%
  Number of PMVs:                                0 out of       1    0%
  Number of STARTUPs:                            0 out of       1    0%
  Number of SUSPEND_SYNCs:                       0 out of       1    0%

Average Fanout of Non-Clock Nets:                4.15

Peak Memory Usage:  967 MB
Total REAL time to MAP completion:  1 mins 58 secs 
Total CPU time to MAP completion (all processors):   2 mins 2 secs 

Table of Contents
-----------------
Section 1 - Errors
Section 2 - Warnings
Section 3 - Informational
Section 4 - Removed Logic Summary
Section 5 - Removed Logic
Section 6 - IOB Properties
Section 7 - RPMs
Section 8 - Guide Report
Section 9 - Area Group and Partition Summary
Section 10 - Timing Report
Section 11 - Configuration String Information
Section 12 - Control Set Information
Section 13 - Utilization by Hierarchy

Section 1 - Errors
------------------

Section 2 - Warnings
--------------------
WARNING:MapLib:701 - Signal I_FX2_FLAG<3> connected to top level port
   I_FX2_FLAG<3> has been removed.
WARNING:Timing:3402 - The Clock Modifying COMP, GEN_CLKSYS/USEDCM.DCM, has the attribute CLK_FEEDBACK set to NONE.  No phase relationship
   exists between the input and output clocks of this Clock Modifying COMP. Data paths between these clock domains must be constrained using
   FROM/TO constraints.
WARNING:PhysDesignRules:1176 - Issue with pin connections and/or configuration
   on
   block:<SYS70/CACHE/CMEM_DAT1/UMEM/AW_11_S9.GL[0].MEM>:<RAMB16BWER_RAMB16BWER>
   .  The block is configured to use input parity pin DIBP0. There is dangling
   output for parity pin DOPB0.
WARNING:PhysDesignRules:1176 - Issue with pin connections and/or configuration
   on
   block:<SYS70/CACHE/CMEM_DAT3/UMEM/AW_11_S9.GL[0].MEM>:<RAMB16BWER_RAMB16BWER>
   .  The block is configured to use input parity pin DIBP0. There is dangling
   output for parity pin DOPB0.
WARNING:PhysDesignRules:1176 - Issue with pin connections and/or configuration
   on
   block:<SYS70/CACHE/CMEM_TAG/UMEM/AW_11_S9.GL[0].MEM>:<RAMB16BWER_RAMB16BWER>.
    The block is configured to use input parity pin DIBP0. There is dangling
   output for parity pin DOPB0.
WARNING:PhysDesignRules:1176 - Issue with pin connections and/or configuration
   on
   block:<SYS70/CACHE/CMEM_DAT0/UMEM/AW_11_S9.GL[0].MEM>:<RAMB16BWER_RAMB16BWER>
   .  The block is configured to use input parity pin DIBP0. There is dangling
   output for parity pin DOPB0.
WARNING:PhysDesignRules:1176 - Issue with pin connections and/or configuration
   on
   block:<SYS70/CACHE/CMEM_DAT2/UMEM/AW_11_S9.GL[0].MEM>:<RAMB16BWER_RAMB16BWER>
   .  The block is configured to use input parity pin DIBP0. There is dangling
   output for parity pin DOPB0.

Section 3 - Informational
-------------------------
INFO:Map:284 - Map is running with the multi-threading option on. Map currently
   supports the use of up to 2 processors. Based on the the user options and
   machine load, Map will use 2 processors during this run.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/IOB_FX2_FLAG/R_DI<3> has no load.
INFO:LIT:243 - Logical network I_MEM_WAIT_IBUF has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[0].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[0].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[1].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[1].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[2].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[2].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[3].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[3].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[4].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[4].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[5].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[5].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[6].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[6].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[7].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.GL[7].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[7].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[7].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[6].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[6].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[5].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[5].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[4].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[4].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[3].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[3].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[2].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[2].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[1].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[1].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[0].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/TXFIFO/RAM/AW_5.GL[0].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[7].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[7].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[6].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[6].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[5].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[5].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[4].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[4].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[3].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[3].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[2].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[2].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[1].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[1].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[0].MEM0/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/FX2CNTL/RXFIFO/RAM/AW_5.GL[0].MEM1/SPO has
   no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[7].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[7].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[6].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[6].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[5].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[5].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[4].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[4].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[3].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[3].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[2].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[2].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[1].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[1].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[0].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.GL[0].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[7].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[7].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[6].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[6].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[5].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[5].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[4].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[4].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[3].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[3].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[2].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[2].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[1].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[1].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[0].MEM0/SPO
   has no load.
INFO:LIT:243 - Logical network RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.GL[0].MEM1/SPO
   has no load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[0].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[1].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[2].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[3].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[4].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[5].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[6].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[7].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[8].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[9].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[10].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[11].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[12].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[13].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[14].MEM/SPO has no
   load.
INFO:LIT:243 - Logical network SYS70/DMCMON.I0/MAL/AW_4.GL[15].MEM/SPO has no
   load.
INFO:MapLib:562 - No environment variables are currently set.
INFO:Pack:1716 - Initializing temperature to 85.000 Celsius. (default - Range:
   0.000 to 85.000 Celsius)
INFO:Pack:1720 - Initializing voltage to 1.140 Volts. (default - Range: 1.140 to
   1.260 Volts)
INFO:Map:215 - The Interim Design Summary has been generated in the MAP Report
   (.mrp).
INFO:Pack:1650 - Map created a placed design.
INFO:PhysDesignRules:1861 - To achieve optimal frequency synthesis performance
   with the CLKFX and CLKFX180 outputs of the DCM comp GEN_CLKSYS/USEDCM.DCM,
   consult the device Data Sheet.

Section 4 - Removed Logic Summary
---------------------------------
   3 block(s) removed
   2 block(s) optimized away
   3 signal(s) removed
 107 Block(s) redundant

Section 5 - Removed Logic
-------------------------

The trimmed logic report below shows the logic removed from your design due to
sourceless or loadless signals, and VCC or ground connections.  If the removal
of a signal or symbol results in the subsequent removal of an additional signal
or symbol, the message explaining that second removal will be indented.  This
indentation will be repeated as a chain of related logic is removed.

To quickly locate the original cause for the removal of a chain of logic, look
above the place where that logic is listed in the trimming report, then locate
the lines that are least indented (begin at the leftmost edge).

The signal "RLINK/FX2CNTL/IOB_FX2_FLAG/R_DI<3>" is loadless and has been
removed.
 Loadless block "RLINK/FX2CNTL/IOB_FX2_FLAG/R_DI_3" (FF) removed.
  The signal "I_FX2_FLAG_3_IBUF" is loadless and has been removed.
   Loadless block "I_FX2_FLAG_3_IBUF" (BUF) removed.
    The signal "I_FX2_FLAG<3>" is loadless and has been removed.
     Loadless block "I_FX2_FLAG<3>" (PAD) removed.

Optimized Block(s):
TYPE 		BLOCK
GND 		XST_GND
VCC 		XST_VCC

Redundant Block(s):
TYPE 		BLOCK
LUT1 		RLINK/FX2CNTL/Mcount_R_REGS_petocnt_cy<0>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<10>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<9>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<8>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<7>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<6>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<5>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<4>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<3>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<2>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_cy<1>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<9>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<8>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<7>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<6>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<5>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<4>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<3>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<2>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_cy<1>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<12>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<11>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<10>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<9>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<8>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<7>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<6>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<5>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<4>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<3>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<2>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_cy<1>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_cy<8>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_cy<7>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_cy<6>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_cy<5>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_cy<4>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_cy<3>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_cy<2>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_cy<1>_rt
LUT1 		SYS70/DMCMON.I0/Mcount_R_REGS_cnum_cy<6>_rt
LUT1 		SYS70/DMCMON.I0/Mcount_R_REGS_cnum_cy<5>_rt
LUT1 		SYS70/DMCMON.I0/Mcount_R_REGS_cnum_cy<4>_rt
LUT1 		SYS70/DMCMON.I0/Mcount_R_REGS_cnum_cy<3>_rt
LUT1 		SYS70/DMCMON.I0/Mcount_R_REGS_cnum_cy<2>_rt
LUT1 		SYS70/DMCMON.I0/Mcount_R_REGS_cnum_cy<1>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_cy<14>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_cy<13>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_cy<12>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_cy<11>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_cy<10>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_cy<9>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_cy<8>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_cy<7>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_cy<19>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_cy<18>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_cy<17>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_cy<16>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_cy<15>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_cy<14>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_cy<13>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_cy<12>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<13>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<12>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<11>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<10>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<9>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<8>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<7>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<6>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<5>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<4>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<3>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<2>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_cy<1>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<12>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<11>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<10>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<9>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<8>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<7>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<6>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<5>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<4>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<3>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<2>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_cy<1>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_cy<8>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_cy<7>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_cy<6>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_cy<5>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_cy<4>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_cy<3>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_cy<2>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_cy<1>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_LREGS_rtaddra_xor<11>_rt
LUT1 		RLINK/CORE/RL/Mcount_R_BREGS_dcnt_xor<10>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbndly_xor<13>_rt
LUT1 		RLINK/RBMON.I0/Mcount_R_REGS_rbnbusy_xor<9>_rt
LUT1 		SYS70/DMCMON.I0/Mcount_R_REGS_cnum_xor<7>_rt
LUT1 		CLKDIV/Mcount_R_REGS_mcnt_cy<1>_rt
LUT1 		SYS70/W11A/VMBOX/MMU/Madd_proc_paddr.ipaddrh_xor<15>_rt
LUT1 		SYS70/W11A/VMBOX/UBMAP/Madd_ADDR_PM_xor<20>_rt
LUT1 		SYS70/W11A/DPATH/GPR/Madd_R_PC[15]_GND_127_o_add_9_OUT_xor<14>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibndly_xor<13>_rt
LUT1 		SYS70/IBMON.I0/Mcount_R_REGS_ibnbusy_xor<9>_rt
INV 		SRAM_CTL/CLK_1801_INV_0

Section 6 - IOB Properties
--------------------------

+---------------------------------------------------------------------------------------------------------------------------------------------------------+
| IOB Name                           | Type             | Direction | IO Standard          | Diff  | Drive    | Slew | Reg (s)      | Resistor | IOB      |
|                                    |                  |           |                      | Term  | Strength | Rate |              |          | Delay    |
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
| IO_FX2_DATA<0>                     | IOB              | BIDIR     | LVCMOS33             |       | 12       | FAST | IFF          | KEEPER   | DEFAULT  |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_FX2_DATA<1>                     | IOB              | BIDIR     | LVCMOS33             |       | 12       | FAST | IFF          | KEEPER   | DEFAULT  |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_FX2_DATA<2>                     | IOB              | BIDIR     | LVCMOS33             |       | 12       | FAST | IFF          | KEEPER   | DEFAULT  |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_FX2_DATA<3>                     | IOB              | BIDIR     | LVCMOS33             |       | 12       | FAST | IFF          | KEEPER   | DEFAULT  |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_FX2_DATA<4>                     | IOB              | BIDIR     | LVCMOS33             |       | 12       | FAST | IFF          | KEEPER   | DEFAULT  |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_FX2_DATA<5>                     | IOB              | BIDIR     | LVCMOS33             |       | 12       | FAST | IFF          | KEEPER   | DEFAULT  |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_FX2_DATA<6>                     | IOB              | BIDIR     | LVCMOS33             |       | 12       | FAST | IFF          | KEEPER   | DEFAULT  |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_FX2_DATA<7>                     | IOB              | BIDIR     | LVCMOS33             |       | 12       | FAST | IFF          | KEEPER   | DEFAULT  |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<0>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<1>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<2>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<3>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<4>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<5>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<6>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<7>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<8>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<9>                     | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<10>                    | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<11>                    | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<12>                    | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<13>                    | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<14>                    | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| IO_MEM_DATA<15>                    | IOB              | BIDIR     | LVCMOS33             |       | 6        | SLOW | IFF          | KEEPER   |          |
|                                    |                  |           |                      |       |          |      | OFF          |          |          |
|                                    |                  |           |                      |       |          |      | TFF          |          |          |
| I_BTN<0>                           | IOB              | INPUT     | LVCMOS25             |       |          |      | IFF          |          |          |
| I_BTN<1>                           | IOB              | INPUT     | LVCMOS25             |       |          |      | IFF          |          |          |
| I_BTN<2>                           | IOB              | INPUT     | LVCMOS25             |       |          |      | IFF          |          |          |
| I_BTN<3>                           | IOB              | INPUT     | LVCMOS25             |       |          |      | IFF          |          |          |
| I_BTN<4>                           | IOB              | INPUT     | LVCMOS25             |       |          |      | IFF          |          |          |
| I_CLK100                           | IOB              | INPUT     | LVCMOS33             |       |          |      |              |          |          |
| I_FUSP_CTS_N                       | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          | PULLDOWN |          |
| I_FUSP_RXD                         | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          | PULLUP   |          |
| I_FX2_FLAG<0>                      | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          | DEFAULT  |
| I_FX2_FLAG<1>                      | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          | DEFAULT  |
| I_FX2_FLAG<2>                      | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          | DEFAULT  |
| I_FX2_IFCLK                        | IOB              | INPUT     | LVCMOS33             |       |          |      |              |          |          |
| I_MEM_WAIT                         | IOB              | INPUT     | LVCMOS33             |       |          |      |              | PULLDOWN |          |
| I_RXD                              | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| I_SWI<0>                           | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| I_SWI<1>                           | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| I_SWI<2>                           | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| I_SWI<3>                           | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| I_SWI<4>                           | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| I_SWI<5>                           | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| I_SWI<6>                           | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| I_SWI<7>                           | IOB              | INPUT     | LVCMOS33             |       |          |      | IFF          |          |          |
| O_ANO_N<0>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_ANO_N<1>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_ANO_N<2>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_ANO_N<3>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_FUSP_RTS_N                       | IOB              | OUTPUT    | LVCMOS33             |       | 4        | SLOW | OFF          |          |          |
| O_FUSP_TXD                         | IOB              | OUTPUT    | LVCMOS33             |       | 4        | SLOW | OFF          |          |          |
| O_FX2_FIFO<0>                      | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_FX2_FIFO<1>                      | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_FX2_PKTEND_N                     | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_FX2_SLOE_N                       | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_FX2_SLRD_N                       | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_FX2_SLWR_N                       | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_LED<0>                           | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_LED<1>                           | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_LED<2>                           | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_LED<3>                           | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_LED<4>                           | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_LED<5>                           | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_LED<6>                           | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_LED<7>                           | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_MEM_ADDR<0>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<1>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<2>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<3>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<4>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<5>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<6>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<7>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<8>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<9>                      | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<10>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<11>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<12>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<13>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<14>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<15>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<16>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<17>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<18>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<19>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<20>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST | OFF          |          |          |
| O_MEM_ADDR<21>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST |              |          |          |
| O_MEM_ADDR<22>                     | IOB              | OUTPUT    | LVCMOS33             |       | 6        | FAST |              |          |          |
| O_MEM_ADV_N                        | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST |              |          |          |
| O_MEM_BE_N<0>                      | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_MEM_BE_N<1>                      | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_MEM_CE_N                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_MEM_CLK                          | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST |              |          |          |
| O_MEM_CRE                          | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST |              |          |          |
| O_MEM_OE_N                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_MEM_WE_N                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | FAST | OFF          |          |          |
| O_PPCM_CE_N                        | IOB              | OUTPUT    | LVCMOS33             |       | 6        | SLOW |              |          |          |
| O_PPCM_RST_N                       | IOB              | OUTPUT    | LVCMOS33             |       | 6        | SLOW |              |          |          |
| O_SEG_N<0>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_SEG_N<1>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_SEG_N<2>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_SEG_N<3>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_SEG_N<4>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_SEG_N<5>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_SEG_N<6>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_SEG_N<7>                         | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
| O_TXD                              | IOB              | OUTPUT    | LVCMOS33             |       | 12       | SLOW | OFF          |          |          |
+---------------------------------------------------------------------------------------------------------------------------------------------------------+

Section 7 - RPMs
----------------

Section 8 - Guide Report
------------------------
Guide not run on this design.

Section 9 - Area Group and Partition Summary
--------------------------------------------

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

Area Group Information
----------------------

  No area groups were found in this design.

----------------------

Section 10 - Timing Report
--------------------------
A logic-level (pre-route) timing report can be generated by using Xilinx static
timing analysis tools, Timing Analyzer (GUI) or TRCE (command line), with the
mapped NCD and PCF files. Please note that this timing report will be generated
using estimated delay information. For accurate numbers, please generate a
timing report with the post Place and Route NCD file.

For more information about the Timing Analyzer, consult the Xilinx Timing
Analyzer Reference Manual; for more information about TRCE, consult the Xilinx
Command Line Tools User Guide "TRACE" chapter.

Section 11 - Configuration String Details
-----------------------------------------
DCM "GEN_CLKSYS/USEDCM.DCM":
CLKDV_DIVIDE:2.0
CLKIN_DIVIDE_BY_2:FALSE
CLKOUT_PHASE_SHIFT:NONE
CLK_FEEDBACK:NONE
DESKEW_ADJUST:5
DFS_FREQUENCY_MODE:LOW
DLL_FREQUENCY_MODE:LOW
DSS_MODE:NONE
DUTY_CYCLE_CORRECTION:TRUE
STARTUP_WAIT:FALSE
VERY_HIGH_FREQUENCY:FALSE
CLKFX_DIVIDE = 25
CLKFX_MULTIPLY = 16
CLKIN_PERIOD = 10.000000
PHASE_SHIFT = 0



Section 12 - Control Set Information
------------------------------------
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Clock Signal      | Reset Signal                                               | Set Signal | Enable Signal                                                 | Slice Load Count | Bel Load Count |
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| CLK               |                                                            |            |                                                               | 157              | 364            |
| CLK               |                                                            |            | CLKDIV/R_REGS_msec                                            | 1                | 2              |
| CLK               |                                                            |            | CLKDIV/R_REGS_usec                                            | 3                | 12             |
| CLK               |                                                            |            | HIO/HIO/DRV/R_REGS_cdiv[6]_GND_307_o_equal_4_o                | 1                | 2              |
| CLK               |                                                            |            | HIO/HIO/HIO/DEB.DEB_SWI/_n0083                                | 11               | 26             |
| CLK               |                                                            |            | HIO/_n0265_inv                                                | 2                | 6              |
| CLK               |                                                            |            | HIO/_n0279_inv                                                | 2                | 8              |
| CLK               |                                                            |            | HIO/_n0286_inv                                                | 4                | 16             |
| CLK               |                                                            |            | HIO/_n0293_inv                                                | 1                | 4              |
| CLK               |                                                            |            | HIO/_n0300_inv                                                | 5                | 5              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n1631_inv                                   | 23               | 41             |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n1694_inv                                   | 3                | 12             |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n1782_inv                                   | 2                | 6              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n1827_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n1846_inv                                   | 3                | 7              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n1850_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n1904_inv                                   | 3                | 3              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n1987_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2103_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2195_inv                                   | 3                | 5              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2371_inv                                   | 1                | 2              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2432_inv                                   | 1                | 2              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2503_inv                                   | 3                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2543_inv                                   | 1                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2580_inv                                   | 3                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2638_inv                                   | 2                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2723_inv                                   | 3                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2769_inv                                   | 1                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2832_inv                                   | 1                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2901_inv                                   | 1                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n2964_inv                                   | 2                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3011_inv                                   | 1                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3048_inv                                   | 2                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3176_inv                                   | 1                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3197_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3220_inv                                   | 1                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3263_inv                                   | 2                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3307_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3348_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3389_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3433_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3486_inv                                   | 1                | 1              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3626_inv                                   | 2                | 2              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/_n3643_inv                                   | 1                | 3              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/proc_next.imem_we0                           | 1                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RHRP.I0/proc_next.imem_we1                           | 1                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RK11.I0/proc_next.imem_we0                           | 1                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RK11.I0/proc_next.imem_we1                           | 1                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RL11.I0/_n0701_inv                                   | 1                | 4              |
| CLK               |                                                            |            | IBDR_SYS/RL11.I0/_n0766_inv                                   | 1                | 5              |
| CLK               |                                                            |            | IBDR_SYS/RL11.I0/proc_next.imem_we0                           | 2                | 8              |
| CLK               |                                                            |            | IBDR_SYS/RL11.I0/proc_next.imem_we1                           | 1                | 8              |
| CLK               |                                                            |            | IBDR_SYS/TM11.I0/_n0721_inv                                   | 2                | 8              |
| CLK               |                                                            |            | IBDR_SYS/TM11.I0/_n0721_inv3                                  | 2                | 8              |
| CLK               |                                                            |            | IBDR_SYS/TM11.I0/_n0781_inv                                   | 1                | 2              |
| CLK               |                                                            |            | RLINK/CORE/B2CD/proc_next.ibusy_inv                           | 4                | 9              |
| CLK               |                                                            |            | RLINK/CORE/CD2B/_n0086_inv                                    | 1                | 3              |
| CLK               |                                                            |            | RLINK/CORE/CD2B/_n0091_inv                                    | 3                | 8              |
| CLK               |                                                            |            | RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.WE0                        | 2                | 16             |
| CLK               |                                                            |            | RLINK/CORE/RL/DOFIFO/FIFO/RAM/AW_5.WE1                        | 2                | 16             |
| CLK               |                                                            |            | RLINK/CORE/RL/DOFIFO/FIFO/_n0086_inv                          | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/DOFIFO/FIFO/_n0109_inv                          | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/DOFIFO/FIFO/proc_next.iram_we                   | 1                | 5              |
| CLK               |                                                            |            | RLINK/CORE/RL/DOFIFO/FIFO/proc_next.re_val                    | 1                | 5              |
| CLK               |                                                            |            | RLINK/CORE/RL/R_BREGS_rbre                                    | 8                | 16             |
| CLK               |                                                            |            | RLINK/CORE/RL/R_LREGS_state_FSM_FFd36                         | 2                | 8              |
| CLK               |                                                            |            | RLINK/CORE/RL/R_LREGS_state_FSM_FFd40                         | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1211_inv                                      | 2                | 8              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1236_inv                                      | 3                | 16             |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1286_inv                                      | 5                | 16             |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1340_inv                                      | 4                | 16             |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1343_inv                                      | 3                | 12             |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1363_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1399_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1405_inv                                      | 2                | 8              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1443_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1484_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1636_inv                                      | 2                | 3              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1687_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1738_inv                                      | 2                | 8              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1797_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1847_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1885_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1944_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1947_inv                                      | 3                | 11             |
| CLK               |                                                            |            | RLINK/CORE/RL/_n1981_inv                                      | 1                | 1              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n2012_inv                                      | 1                | 4              |
| CLK               |                                                            |            | RLINK/CORE/RL/_n2019_inv                                      | 4                | 10             |
| CLK               |                                                            |            | RLINK/FX2CNTL/RXFIFO/proc_nextr.igcr_ce                       | 2                | 5              |
| CLK               |                                                            |            | RLINK/FX2CNTL/TXFIFO/RAM/AW_5.WE0                             | 2                | 16             |
| CLK               |                                                            |            | RLINK/FX2CNTL/TXFIFO/RAM/AW_5.WE1                             | 2                | 16             |
| CLK               |                                                            |            | RLINK/FX2CNTL/TXFIFO/proc_nextw.igcw_ce                       | 1                | 5              |
| CLK               |                                                            |            | RLINK/RBMON.I0/_n0319                                         | 2                | 2              |
| CLK               |                                                            |            | RLINK/RBMON.I0/_n0338_inv                                     | 1                | 1              |
| CLK               |                                                            |            | RLINK/RBMON.I0/_n0345_inv                                     | 4                | 16             |
| CLK               |                                                            |            | RLINK/RBMON.I0/_n0352_inv                                     | 4                | 16             |
| CLK               |                                                            |            | RLINK/RBMON.I0/_n0383_inv                                     | 3                | 9              |
| CLK               |                                                            |            | RLINK/RBMON.I0/_n0414_inv                                     | 1                | 2              |
| CLK               |                                                            |            | RLINK/RBMON.I0/proc_next.n_rbtake_1                           | 11               | 36             |
| CLK               |                                                            |            | RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.WE0                        | 2                | 16             |
| CLK               |                                                            |            | RLINK/SERPORT/RXFIFO/FIFO/RAM/AW_5.WE1                        | 2                | 16             |
| CLK               |                                                            |            | RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.WE0                        | 2                | 16             |
| CLK               |                                                            |            | RLINK/SERPORT/TXFIFO/FIFO/RAM/AW_5.WE1                        | 2                | 16             |
| CLK               |                                                            |            | RLINK/SERPORT/UART/AB/_n0078                                  | 1                | 1              |
| CLK               |                                                            |            | RLINK/SERPORT/UART/AB/_n0106_inv                              | 4                | 16             |
| CLK               |                                                            |            | RLINK/SERPORT/UART/RXTX/RX/Mmux_proc_next.ce_bcnt1121         | 2                | 8              |
| CLK               |                                                            |            | RLINK/SERPORT/UART/RXTX/RX/_n0122_inv                         | 4                | 14             |
| CLK               |                                                            |            | RLINK/SERPORT/UART/RXTX/TX/_n0063_inv                         | 2                | 9              |
| CLK               |                                                            |            | SYS70/DMCMON.I0/R_REGS_dp_ireg_we                             | 4                | 15             |
| CLK               |                                                            |            | SYS70/DMCMON.I0/_n0834_inv                                    | 3                | 3              |
| CLK               |                                                            |            | SYS70/DMCMON.I0/_n0883_inv                                    | 2                | 8              |
| CLK               |                                                            |            | SYS70/DMCMON.I0/_n0916_inv                                    | 2                | 4              |
| CLK               |                                                            |            | SYS70/DMCMON.I0/_n0922_inv                                    | 13               | 32             |
| CLK               |                                                            |            | SYS70/DMCMON.I0/proc_next.imal_we                             | 4                | 32             |
| CLK               |                                                            |            | SYS70/DMHBPT.I0/GU[0].HBPT/_n0218_inv                         | 4                | 5              |
| CLK               |                                                            |            | SYS70/DMHBPT.I0/GU[0].HBPT/_n0246_inv                         | 4                | 15             |
| CLK               |                                                            |            | SYS70/DMHBPT.I0/GU[0].HBPT/_n0253_inv                         | 4                | 15             |
| CLK               |                                                            |            | SYS70/DMHBPT.I0/GU[1].HBPT/_n0218_inv                         | 4                | 5              |
| CLK               |                                                            |            | SYS70/DMHBPT.I0/GU[1].HBPT/_n0246_inv                         | 4                | 15             |
| CLK               |                                                            |            | SYS70/DMHBPT.I0/GU[1].HBPT/_n0253_inv                         | 4                | 15             |
| CLK               |                                                            |            | SYS70/DMSCNT.I0/R_REGS_state                                  | 5                | 20             |
| CLK               |                                                            |            | SYS70/DMSCNT.I0/_n0284_inv                                    | 1                | 1              |
| CLK               |                                                            |            | SYS70/DMSCNT.I0/_n0320_inv                                    | 4                | 9              |
| CLK               |                                                            |            | SYS70/DM_STAT_SE_istart                                       | 4                | 15             |
| CLK               |                                                            |            | SYS70/DM_STAT_VM_vmstat_ack                                   | 16               | 34             |
| CLK               |                                                            |            | SYS70/DM_STAT_VM_vmstat_err                                   | 4                | 5              |
| CLK               |                                                            |            | SYS70/IBMON.I0/_n0380                                         | 2                | 2              |
| CLK               |                                                            |            | SYS70/IBMON.I0/_n0396_inv                                     | 4                | 4              |
| CLK               |                                                            |            | SYS70/IBMON.I0/_n0424_inv                                     | 3                | 12             |
| CLK               |                                                            |            | SYS70/IBMON.I0/_n0431_inv                                     | 3                | 12             |
| CLK               |                                                            |            | SYS70/IBMON.I0/_n0462_inv                                     | 3                | 9              |
| CLK               |                                                            |            | SYS70/IBMON.I0/_n0493_inv                                     | 1                | 2              |
| CLK               |                                                            |            | SYS70/IBMON.I0/proc_next.n_ibtake_1                           | 12               | 36             |
| CLK               |                                                            |            | SYS70/RB2CP/_n0343_inv                                        | 1                | 1              |
| CLK               |                                                            |            | SYS70/RB2CP/_n0395_inv                                        | 2                | 5              |
| CLK               |                                                            |            | SYS70/RB2CP/_n0437_inv                                        | 6                | 21             |
| CLK               |                                                            |            | SYS70/RB2CP/_n0474_inv                                        | 1                | 2              |
| CLK               |                                                            |            | SYS70/RB2CP/_n0540_inv                                        | 1                | 2              |
| CLK               |                                                            |            | SYS70/RB2CP/_n0540_inv3                                       | 1                | 1              |
| CLK               |                                                            |            | SYS70/RB2CP/_n0567_inv                                        | 2                | 2              |
| CLK               |                                                            |            | SYS70/W11A/DPATH/GPR/WE1                                      | 2                | 16             |
| CLK               |                                                            |            | SYS70/W11A/DPATH/MUNIT/S_ASH_S_ASHC_OR_306_o                  | 1                | 1              |
| CLK               |                                                            |            | SYS70/W11A/DPATH/MUNIT/_n0194_inv                             | 1                | 1              |
| CLK               |                                                            |            | SYS70/W11A/DPATH/MUNIT/_n0199_inv                             | 3                | 6              |
| CLK               |                                                            |            | SYS70/W11A/DPATH/MUNIT/_n0203_inv                             | 7                | 16             |
| CLK               |                                                            |            | SYS70/W11A/DPATH/PSR/_n0160_inv                               | 3                | 5              |
| CLK               |                                                            |            | SYS70/W11A/DPATH/PSR/_n0268_inv                               | 2                | 3              |
| CLK               |                                                            |            | SYS70/W11A/DPATH/PSR/_n0289_inv                               | 2                | 4              |
| CLK               |                                                            |            | SYS70/W11A/DP_CNTL_ddst_we                                    | 7                | 16             |
| CLK               |                                                            |            | SYS70/W11A/DP_CNTL_dsrc_we                                    | 6                | 16             |
| CLK               |                                                            |            | SYS70/W11A/DP_CNTL_dtmp_we                                    | 4                | 16             |
| CLK               |                                                            |            | SYS70/W11A/DP_CNTL_gpr_we                                     | 3                | 16             |
| CLK               |                                                            |            | SYS70/W11A/DP_CNTL_ireg_we                                    | 14               | 20             |
| CLK               |                                                            |            | SYS70/W11A/DP_CNTL_munit_s_div                                | 2                | 3              |
| CLK               |                                                            |            | SYS70/W11A/VMBOX/MMU/SADR/SAR_HIGH_WE                         | 3                | 8              |
| CLK               |                                                            |            | SYS70/W11A/VMBOX/MMU/SADR/SAR_LOW_WE                          | 3                | 8              |
| CLK               |                                                            |            | SYS70/W11A/VMBOX/MMU/SADR/SDR_AIB_WE                          | 1                | 2              |
| CLK               |                                                            |            | SYS70/W11A/VMBOX/MMU/SADR/SDR_LOW_WE                          | 1                | 4              |
| CLK               |                                                            |            | SYS70/W11A/VMBOX/MMU/SADR/SDR_SLF_WE                          | 4                | 7              |
| CLK               |                                                            |            | SYS70/W11A/VMBOX/UBMAP/proc_comb.iwe0                         | 1                | 7              |
| CLK               |                                                            |            | SYS70/W11A/VMBOX/UBMAP/proc_comb.iwe1                         | 1                | 8              |
| CLK               |                                                            |            | SYS70/W11A/VMBOX/UBMAP/proc_comb.iwe2                         | 1                | 6              |
| CLK               |                                                            |            | SYS70/W11A/VM_CNTL_req                                        | 14               | 26             |
| CLK               | CLKDIV/_n0036                                              |            | CLKDIV/Result<6>_bdd0                                         | 3                | 8              |
| CLK               | CLKDIV/proc_next.n_usec_inv                                |            |                                                               | 1                | 1              |
| CLK               | HIO/HIO/HIO/DEB.DEB_SWI/_n0083                             |            |                                                               | 4                | 13             |
| CLK               | HIO/R_REGS_swieff<0>                                       |            |                                                               | 1                | 1              |
| CLK               | IBDR_SYS/DL11_0/IB_MREQ_aval_0                             |            |                                                               | 5                | 6              |
| CLK               | IBDR_SYS/EI_ACK<13>                                        |            | IBDR_SYS/RHRP.I0/_n3690_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/EI_ACK<13>                                        |            | IBDR_SYS/RHRP.I0/_n3735_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            |                                                               | 17               | 36             |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1313_inv                                   | 1                | 4              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1327_inv                                   | 1                | 4              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1341_inv                                   | 1                | 4              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1370_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1403_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1412_inv                                   | 2                | 2              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1435_inv                                   | 2                | 4              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1449_inv                                   | 1                | 4              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1460_inv                                   | 2                | 8              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1469_inv                                   | 3                | 3              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1496_inv                                   | 1                | 4              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1505_inv                                   | 1                | 4              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1514_inv                                   | 3                | 4              |
| CLK               | IBDR_SYS/IIST.I0/BRESET_R_REGS_req_clear_OR_533_o          |            | IBDR_SYS/IIST.I0/_n1541_inv                                   | 4                | 4              |
| CLK               | IBDR_SYS/IIST.I0/IB_MREQ_aval_0                            |            |                                                               | 1                | 1              |
| CLK               | IBDR_SYS/IIST.I0/_n1260                                    |            |                                                               | 3                | 8              |
| CLK               | IBDR_SYS/IIST.I0/_n1260                                    |            | IBDR_SYS/IIST.I0/_n1588_inv                                   | 2                | 8              |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/DL11_0/_n0309_inv                                    | 1                | 3              |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/DL11_0/_n0337_inv                                    | 1                | 1              |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/DL11_0/_n0340_inv                                    | 3                | 10             |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/DL11_1.I0/_n0309_inv                                 | 1                | 3              |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/DL11_1.I0/_n0337_inv                                 | 1                | 1              |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/DL11_1.I0/_n0340_inv                                 | 3                | 10             |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/KW11L/CE_MSEC_CPUSUSP_AND_622_o                      | 1                | 5              |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/LP11.I0/_n0132_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/PC11.I0/_n0451_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/KW11L/_n0066                                      |            | IBDR_SYS/PC11.I0/_n0460_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/RHRP.I0/_n1606                                    |            | IBDR_SYS/RHRP.I0/proc_next.iscinc                             | 1                | 6              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            |                                                               | 6                | 11             |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | CLKDIV/R_REGS_msec                                            | 1                | 4              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/Mmux_proc_next.ilam11                        | 1                | 1              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/R_REGS_state                                 | 1                | 3              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0450                                       | 1                | 3              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0447<8>1                                   | 1                | 3              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0489_inv                                   | 1                | 2              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0524_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0531_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0545_inv                                   | 1                | 3              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0647_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0727_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/RK11.I0/BRESET_R_REGS_creset_OR_589_o             |            | IBDR_SYS/RK11.I0/_n0762_inv                                   | 1                | 1              |
| CLK               | IBDR_SYS/RK11.I0/IB_MREQ_aval_0                            |            |                                                               | 1                | 1              |
| CLK               | IBDR_SYS/RK11.I0/_n0438                                    |            | IBDR_SYS/RK11.I0/_n0682_inv                                   | 2                | 8              |
| CLK               | IBDR_SYS/SDREG/IB_MREQ_aval_0                              |            |                                                               | 1                | 1              |
| CLK               | IBDR_SYS/TM11.I0/EI_ACK_R_REGS_crie_OR_612_o               |            |                                                               | 1                | 1              |
| CLK               | IBDR_SYS/TM11.I0/R_REGS_resreq                             |            |                                                               | 3                | 3              |
| CLK               | IBDR_SYS/TM11.I0/R_REGS_resreq                             |            | IBDR_SYS/TM11.I0/Mmux_proc_next.idout61                       | 14               | 15             |
| CLK               | IBDR_SYS/TM11.I0/R_REGS_resreq                             |            | IBDR_SYS/TM11.I0/Mmux_proc_next.idout171                      | 4                | 16             |
| CLK               | IBDR_SYS/TM11.I0/R_REGS_resreq                             |            | IBDR_SYS/TM11.I0/_n0721_inv                                   | 3                | 8              |
| CLK               | IBDR_SYS/TM11.I0/R_REGS_resreq                             |            | IBDR_SYS/TM11.I0/_n0801_inv                                   | 3                | 4              |
| CLK               | IBDR_SYS/TM11.I0/R_REGS_resreq                             |            | IBDR_SYS/TM11.I0/_n1019_inv                                   | 1                | 2              |
| CLK               | IBDR_SYS/TM11.I0/R_REGS_resreq                             |            | IBDR_SYS/TM11.I0/_n1034_inv                                   | 1                | 3              |
| CLK               | IBDR_SYS/TM11.I0/R_REGS_resreq                             |            | IBDR_SYS/TM11.I0/_n1091_inv1                                  | 4                | 6              |
| CLK               | IOB_RS232/SEL_inv                                          |            |                                                               | 3                | 3              |
| CLK               | LED_IO/CE_USEC_inv                                         |            |                                                               | 1                | 1              |
| CLK               | RLINK/CORE/B2CD/_n0052                                     |            |                                                               | 1                | 1              |
| CLK               | RLINK/CORE/B2CD/_n0055                                     |            |                                                               | 1                | 1              |
| CLK               | RLINK/CORE/CD2B/_n0078                                     |            | RLINK/CORE/CD2B/_n0094_inv                                    | 1                | 1              |
| CLK               | RLINK/CORE/RL/R_LREGS_state_FSM_FFd40                      |            | RLINK/CORE/RL/proc_lnext.icrcena                              | 4                | 16             |
| CLK               | RLINK/CORE/RL/R_LREGS_state_FSM_FFd40                      |            | RLINK/CORE/RL/proc_lnext.ocrcena                              | 5                | 16             |
| CLK               | RLINK/CORE/RL/_n1140                                       |            |                                                               | 2                | 2              |
| CLK               | RLINK/CORE/RL/_n1140                                       |            | RLINK/CORE/RL/_n2043_inv                                      | 3                | 12             |
| CLK               | RLINK/CORE/RL/_n1153                                       |            |                                                               | 1                | 1              |
| CLK               | RLINK/CORE/RL/proc_bnext.bto_go_inv                        |            |                                                               | 3                | 7              |
| CLK               | RLINK/CORE/RL/proc_bnext.dcnt_clear                        |            | RLINK/CORE/RL/proc_bnext.dcnt_inc                             | 3                | 11             |
| CLK               | RLINK/CORE/RL/proc_lnext.addra_clear                       |            |                                                               | 1                | 1              |
| CLK               | RLINK/CORE/RL/proc_lnext.addra_clear                       |            | RLINK/CORE/RL/_n2037_inv                                      | 3                | 12             |
| CLK               | RLINK/CORE/RL/proc_lnext.addra_clear                       |            | RLINK/CORE/RL/proc_lnext.irtwea                               | 1                | 1              |
| CLK               | RLINK/RBMON.I0/RB_MREQ_aval_inv                            |            |                                                               | 4                | 4              |
| CLK               | RLINK/RBMON.I0/_n0314                                      |            | RLINK/RBMON.I0/_n0499_inv                                     | 1                | 1              |
| CLK               | RLINK/RBMON.I0/_n0319                                      |            | RLINK/RBMON.I0/_n0502_inv                                     | 3                | 10             |
| CLK               | RLINK/RBMON.I0/_n0322                                      |            | RLINK/RBMON.I0/_n0505_inv                                     | 4                | 14             |
| CLK               | RLINK/SERPORT/UART/AB/_n0088                               |            | RLINK/SERPORT/UART/AB/R_REGS_state_FSM_FFd2-In1               | 2                | 7              |
| CLK               | RLINK/SERPORT/UART/RXTX/RX/proc_next.ld_bcnt               |            | RLINK/SERPORT/UART/RXTX/RX/proc_next.ce_bcnt                  | 2                | 4              |
| CLK               | RLINK/SERPORT/UART/RXTX/RX/proc_next.tc_ccnt_0             |            |                                                               | 1                | 1              |
| CLK               | RLINK/SERPORT/UART/RXTX/TX/R_REGS_busy_inv                 |            | RLINK/SERPORT/UART/RXTX/TX/R_REGS_ccnt[12]_GND_68_o_equal_5_o | 1                | 4              |
| CLK               | SER_MONI_abact                                             |            |                                                               | 7                | 8              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/RXFIFO/FIFO/_n0086_inv                          | 1                | 1              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/RXFIFO/FIFO/_n0109_inv                          | 1                | 1              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/RXFIFO/FIFO/proc_next.re_val                    | 1                | 5              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/RXFIFO/FIFO/proc_next.we_val                    | 1                | 5              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/TXFIFO/FIFO/_n0086_inv                          | 1                | 1              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/TXFIFO/FIFO/_n0109_inv                          | 1                | 1              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/TXFIFO/FIFO/proc_next.re_val                    | 2                | 13             |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/TXFIFO/FIFO/proc_next.we_val                    | 1                | 5              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/XONRX/_n0083                                    | 2                | 8              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/XONTX/_n0122_inv                                | 1                | 1              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/XONTX/_n0132_inv                                | 1                | 8              |
| CLK               | SER_MONI_abact                                             |            | RLINK/SERPORT/XONTX/_n0147_inv                                | 1                | 1              |
| CLK               | SYS70/DMCMON.I0/Mmux_proc_next.irb_dout103                 |            |                                                               | 1                | 4              |
| CLK               | SYS70/DMCMON.I0/R_REGS_dp_ireg_we                          |            | SYS70/DMCMON.I0/proc_next.imal_we                             | 1                | 4              |
| CLK               | SYS70/DMCMON.I0/_n0807                                     |            | SYS70/DMCMON.I0/R_REGS_se_snum[7]_GND_193_o_equal_71_o_inv    | 1                | 1              |
| CLK               | SYS70/DMCMON.I0/_n0817                                     |            |                                                               | 1                | 1              |
| CLK               | SYS70/DMSCNT.I0/R_REGS_state                               |            |                                                               | 2                | 2              |
| CLK               | SYS70/DMSCNT.I0/_n0262                                     |            | SYS70/DMSCNT.I0/_n0284_inv                                    | 1                | 1              |
| CLK               | SYS70/IBMON.I0/IB_MREQ_aval_inv                            |            |                                                               | 3                | 3              |
| CLK               | SYS70/IBMON.I0/_n0380                                      |            | SYS70/IBMON.I0/_n0585_inv                                     | 3                | 10             |
| CLK               | SYS70/IBMON.I0/_n0383                                      |            | SYS70/IBMON.I0/_n0588_inv                                     | 4                | 14             |
| CLK               | SYS70/RB2CP/RB_MREQ_init_GND_103_o_AND_83_o_inv            |            |                                                               | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            |                                                               | 39               | 82             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | IBDR_SYS/SDREG/_n0064_inv                                     | 4                | 16             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | IBDR_SYS/SDREG/_n0067_inv                                     | 4                | 16             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SRAM_CTL/_n0197_inv                                           | 3                | 7              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SRAM_CTL/_n0273_inv                                           | 8                | 16             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SRAM_CTL/proc_next.iaddrh_ce                                  | 5                | 18             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/CACHE/proc_next.icmem_tag_cea                           | 14               | 41             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n12821                                        | 3                | 8              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n1407_inv                                     | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n1571_inv                                     | 1                | 3              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n1653_inv                                     | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n2007_inv                                     | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n2314_inv                                     | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n2368_inv                                     | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n2395_inv                                     | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n2439_inv                                     | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/_n2465_inv251                                  | 26               | 41             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/SEQ/proc_next.nstatus_intack                       | 2                | 6              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/VMBOX/R_REGS_state_FSM_FFd1-In4                    | 5                | 5              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/VMBOX/_n0643_inv                                   | 7                | 18             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/VMBOX/_n0723_inv                                   | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/VMBOX/_n0858_inv                                   | 1                | 2              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/VMBOX/_n0901_inv                                   | 1                | 1              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/VMBOX/_n0938_inv                                   | 2                | 4              |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/VMBOX/_n1060_inv                                   | 8                | 16             |
| CLK               | SYS70/RB2CP/R_REGS_rbinit                                  |            | SYS70/W11A/VMBOX/proc_next.iubmap_mreq                        | 7                | 22             |
| CLK               | SYS70/W11A/DPATH/MUNIT/S_DIV_CN_S_ASHC_CN_OR_308_o_inv_inv |            |                                                               | 1                | 1              |
| CLK               | SYS70/W11A/DPATH/MUNIT/_n0185                              |            | SYS70/W11A/DPATH/MUNIT/S_ASH_CN_SHC_TC_L_AND_191_o            | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            |                                                               | 11               | 20             |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_0/Mmux_proc_next.ilam121                        | 2                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_0/_n0329_inv                                    | 1                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_0/_n0349_inv                                    | 2                | 2              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_0/_n0403_inv                                    | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_0/_n0664_inv4                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_1.I0/Mmux_proc_next.ilam121                     | 2                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_1.I0/_n0329_inv                                 | 1                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_1.I0/_n0349_inv                                 | 1                | 2              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_1.I0/_n0403_inv                                 | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/DL11_1.I0/_n0664_inv4                                | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/KW11L/_n0085_inv                                     | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/KW11L/_n0101_inv2                                    | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/LP11.I0/_n0116_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/LP11.I0/_n0124_inv                                   | 2                | 7              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/LP11.I0/_n0142_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/Mmux_proc_next.ilam21                        | 2                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/Mmux_proc_next.ilam22                        | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/_n0263_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/_n0293_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/_n0327_inv                                   | 2                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/_n0378_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/_n0387_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/_n0442_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/PC11.I0/_n0485_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/Mmux_proc_next.imem_addr32                   | 2                | 9              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/Mmux_proc_next.imem_addr81                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/Mmux_proc_next.imem_din202                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n0791_inv                                   | 1                | 2              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n0847_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n0895_inv                                   | 1                | 4              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n0929_inv                                   | 1                | 2              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n0960_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n0993_inv                                   | 1                | 2              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n1027_inv                                   | 1                | 3              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n1067_inv                                   | 10               | 16             |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n1084_inv                                   | 3                | 10             |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n1180_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n1242_inv                                   | 1                | 3              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | IBDR_SYS/RL11.I0/_n1284_inv                                   | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/HM_ENA                                                  | 2                | 6              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/MEM70/R_REGS_ibsel_cr_IB_MREQ_we_AND_559_o              | 4                | 6              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/W11A/IRQ/IBSEL_PIRQ_IB_MREQ_be1_AND_549_o               | 2                | 7              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/W11A/VMBOX/MMU/AIB_WE                                   | 2                | 5              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/W11A/VMBOX/MMU/_n0215_inv                               | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/W11A/VMBOX/MMU/_n0215_inv1                              | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/W11A/VMBOX/MMU/_n0273_inv                               | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/W11A/VMBOX/MMU/_n0277_inv                               | 2                | 5              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_breset                             |            | SYS70/W11A/VMBOX/_n1064_inv                                   | 2                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_creset                             |            |                                                               | 1                | 2              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_creset                             |            | SYS70/W11A/DPATH/PSR/_n0342_inv                               | 1                | 1              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_creset                             |            | SYS70/W11A/DP_CNTL_cpdout_we                                  | 6                | 16             |
| CLK               | SYS70/W11A/SEQ/R_STATUS_creset                             |            | SYS70/W11A/REG70/R_REGS_ibsel_mbrk_IB_MREQ_we_AND_552_o       | 2                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_creset                             |            | SYS70/W11A/VMBOX/MMU/SSR12/_n0151_inv                         | 3                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_creset                             |            | SYS70/W11A/VMBOX/MMU/SSR12/_n0164_inv                         | 3                | 8              |
| CLK               | SYS70/W11A/SEQ/R_STATUS_creset                             |            | SYS70/W11A/VMBOX/MMU/SSR12/_n0184_inv                         | 4                | 16             |
| CLK               | SYS70/W11A/SEQ/Reset_OR_DriverANDClockEnable               |            | SYS70/W11A/SEQ/Mmux_proc_next.ndpcntl_psr_func31              | 1                | 1              |
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| I_FX2_IFCLK_BUFGP |                                                            |            |                                                               | 19               | 47             |
| I_FX2_IFCLK_BUFGP |                                                            |            | RLINK/FX2CNTL/RXFIFO/RAM/AW_5.WE0                             | 2                | 16             |
| I_FX2_IFCLK_BUFGP |                                                            |            | RLINK/FX2CNTL/RXFIFO/RAM/AW_5.WE1                             | 2                | 16             |
| I_FX2_IFCLK_BUFGP |                                                            |            | RLINK/FX2CNTL/RXFIFO/proc_nextw.igcw_ce                       | 1                | 5              |
| I_FX2_IFCLK_BUFGP |                                                            |            | RLINK/FX2CNTL/TXFIFO/proc_nextr.igcr_ce                       | 2                | 5              |
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

Section 13 - Utilization by Hierarchy
-------------------------------------
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Module             | Partition | Slices*       | Slice Reg     | LUTs          | LUTRAM        | BRAM/FIFO | DSP48A1 | BUFG  | BUFIO | BUFR  | DCM   | PLL_ADV   | Full Hierarchical Name                           |
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| sys_w11a_n3/       |           | 2/2746        | 0/2566        | 2/5304        | 0/181         | 0/15      | 0/1     | 1/2   | 0/0   | 0/0   | 0/1   | 0/0       | sys_w11a_n3                                      |
| +CLKDIV            |           | 6/6           | 10/10         | 15/15         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/CLKDIV                               |
| +GEN_CLKSYS        |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 1/1   | 0/0   | 0/0   | 1/1   | 0/0       | sys_w11a_n3/GEN_CLKSYS                           |
| +HIO               |           | 33/61         | 82/132        | 42/75         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO                                  |
| ++HIO              |           | 0/28          | 0/50          | 0/33          | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO                              |
| +++DRV             |           | 9/9           | 9/9           | 18/18         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/DRV                          |
| +++HIO             |           | 0/19          | 0/41          | 0/15          | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/HIO                          |
| ++++DEB.DEB_BTN    |           | 8/8           | 15/15         | 5/5           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/HIO/DEB.DEB_BTN              |
| ++++DEB.DEB_SWI    |           | 11/11         | 26/26         | 10/10         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/HIO/DEB.DEB_SWI              |
| ++++IOB_BTN        |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/HIO/IOB_BTN                  |
| ++++IOB_LED        |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/HIO/IOB_LED                  |
| ++++IOB_SWI        |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/HIO/IOB_SWI                  |
| +++IOB_ANO_N       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/IOB_ANO_N                    |
| +++IOB_SEG_N       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO/HIO/IOB_SEG_N                    |
| +HIO70             |           | 0/3           | 0/0           | 0/7           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO70                                |
| ++LED_MUX          |           | 3/3           | 0/0           | 7/7           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/HIO70/LED_MUX                        |
| +IBDR_SYS          |           | 21/524        | 0/663         | 23/1014       | 0/25          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS                             |
| ++DL11_0           |           | 25/25         | 39/39         | 44/44         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/DL11_0                      |
| ++DL11_1.I0        |           | 25/25         | 39/39         | 41/41         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/DL11_1.I0                   |
| ++IIST.I0          |           | 66/66         | 104/104       | 156/156       | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/IIST.I0                     |
| ++KW11L            |           | 10/10         | 9/9           | 13/13         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/KW11L                       |
| ++LP11.I0          |           | 13/13         | 12/12         | 12/12         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/LP11.I0                     |
| ++PC11.I0          |           | 25/25         | 26/26         | 27/27         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/PC11.I0                     |
| ++RHRP.I0          |           | 151/153       | 208/208       | 371/379       | 0/8           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RHRP.I0                     |
| +++MEM_0           |           | 1/1           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RHRP.I0/MEM_0               |
| +++MEM_1           |           | 1/1           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RHRP.I0/MEM_1               |
| ++RK11.I0          |           | 47/49         | 44/44         | 86/94         | 0/8           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RK11.I0                     |
| +++MEM_0           |           | 1/1           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RK11.I0/MEM_0               |
| +++MEM_1           |           | 1/1           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RK11.I0/MEM_1               |
| ++RL11.I0          |           | 68/71         | 71/71         | 132/141       | 0/9           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RL11.I0                     |
| +++MEM_0           |           | 2/2           | 0/0           | 5/5           | 5/5           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RL11.I0/MEM_0               |
| +++MEM_1           |           | 1/1           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/RL11.I0/MEM_1               |
| ++SDREG            |           | 15/15         | 33/33         | 16/16         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/SDREG                       |
| ++TM11.I0          |           | 51/51         | 78/78         | 68/68         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IBDR_SYS/TM11.I0                     |
| +IOB_RS232         |           | 5/5           | 5/5           | 2/2           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232                            |
| ++P0               |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P0                         |
| +++IOB_RXD         |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P0/IOB_RXD                 |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P0/IOB_RXD/IOB             |
| +++IOB_TXD         |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P0/IOB_TXD                 |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P0/IOB_TXD/IOB             |
| ++P1               |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1                         |
| +++IOB_CTS         |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1/IOB_CTS                 |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1/IOB_CTS/IOB             |
| +++IOB_RTS         |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1/IOB_RTS                 |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1/IOB_RTS/IOB             |
| +++IOB_RXD         |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1/IOB_RXD                 |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1/IOB_RXD/IOB             |
| +++IOB_TXD         |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1/IOB_TXD                 |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/IOB_RS232/P1/IOB_TXD/IOB             |
| +LED_IO            |           | 2/5           | 7/11          | 6/8           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/LED_IO                               |
| ++RXVAL_PSTR       |           | 1/1           | 2/2           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/LED_IO/RXVAL_PSTR                    |
| ++TXENA_PSTR       |           | 2/2           | 2/2           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/LED_IO/TXENA_PSTR                    |
| +RLINK             |           | 0/551         | 0/679         | 0/1205        | 0/80          | 0/4       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK                                |
| ++CORE             |           | 0/218         | 0/328         | 0/486         | 0/16          | 0/2       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE                           |
| +++B2CD            |           | 8/8           | 11/11         | 16/16         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/B2CD                      |
| +++CD2B            |           | 11/11         | 13/13         | 18/18         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/CD2B                      |
| +++RL              |           | 166/199       | 259/304       | 367/452       | 0/16          | 0/2       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL                        |
| ++++DOFIFO         |           | 1/14          | 0/12          | 2/41          | 0/16          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/DOFIFO                 |
| +++++FIFO          |           | 8/13          | 12/12         | 22/39         | 0/16          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/DOFIFO/FIFO            |
| ++++++RAM          |           | 5/5           | 0/0           | 17/17         | 16/16         | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/DOFIFO/FIFO/RAM        |
| ++++ICRC           |           | 4/4           | 16/16         | 13/13         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/ICRC                   |
| ++++OCRC           |           | 5/5           | 16/16         | 13/13         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/OCRC                   |
| ++++RB_SRES_OR     |           | 8/8           | 0/0           | 16/16         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/RB_SRES_OR             |
| ++++RTBUF          |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/2       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/RTBUF                  |
| +++++UMEM          |           | 0/0           | 0/0           | 0/0           | 0/0           | 2/2       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/RTBUF/UMEM             |
| ++++SEL            |           | 2/2           | 1/1           | 2/2           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/CORE/RL/SEL                    |
| ++FX2CNTL          |           | 21/80         | 21/89         | 55/137        | 0/32          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL                        |
| +++IOB_FX2_DATA    |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_DATA           |
| +++IOB_FX2_FIFO    |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_FIFO           |
| +++IOB_FX2_FLAG    |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_FLAG           |
| +++IOB_FX2_PKTEND  |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_PKTEND         |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_PKTEND/IOB     |
| +++IOB_FX2_SLOE    |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_SLOE           |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_SLOE/IOB       |
| +++IOB_FX2_SLRD    |           | 0/2           | 0/1           | 0/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_SLRD           |
| ++++IOB            |           | 2/2           | 1/1           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_SLRD/IOB       |
| +++IOB_FX2_SLWR    |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_SLWR           |
| ++++IOB            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/IOB_FX2_SLWR/IOB       |
| +++RXFIFO          |           | 13/26         | 25/35         | 11/39         | 0/16          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO                 |
| ++++G2B_RR         |           | 2/2           | 0/0           | 2/2           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO/G2B_RR          |
| ++++G2B_RW         |           | 1/1           | 0/0           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO/G2B_RW          |
| ++++G2B_WR         |           | 1/1           | 0/0           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO/G2B_WR          |
| ++++GCR            |           | 0/2           | 0/5           | 0/3           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO/GCR             |
| +++++GRAY_5.CNT    |           | 2/2           | 5/5           | 3/3           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO/GCR/GRAY_5.CNT  |
| ++++GCW            |           | 0/2           | 0/5           | 0/4           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO/GCW             |
| +++++GRAY_5.CNT    |           | 2/2           | 5/5           | 4/4           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO/GCW/GRAY_5.CNT  |
| ++++RAM            |           | 5/5           | 0/0           | 17/17         | 16/16         | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/RXFIFO/RAM             |
| +++TXFIFO          |           | 16/31         | 22/32         | 13/42         | 0/16          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO                 |
| ++++G2B_RR         |           | 1/1           | 0/0           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO/G2B_RR          |
| ++++G2B_WR         |           | 1/1           | 0/0           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO/G2B_WR          |
| ++++G2B_WW         |           | 1/1           | 0/0           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO/G2B_WW          |
| ++++GCR            |           | 0/3           | 0/5           | 0/3           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO/GCR             |
| +++++GRAY_5.CNT    |           | 3/3           | 5/5           | 3/3           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO/GCR/GRAY_5.CNT  |
| ++++GCW            |           | 0/1           | 0/5           | 0/2           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO/GCW             |
| +++++GRAY_5.CNT    |           | 1/1           | 5/5           | 2/2           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO/GCW/GRAY_5.CNT  |
| ++++RAM            |           | 8/8           | 0/0           | 21/21         | 16/16         | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/FX2CNTL/TXFIFO/RAM             |
| ++RBMON.I0         |           | 50/50         | 112/112       | 95/95         | 0/0           | 0/2       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/RBMON.I0                       |
| +++BRAM0           |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/RBMON.I0/BRAM0                 |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/RBMON.I0/BRAM0/UMEM            |
| +++BRAM1           |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/RBMON.I0/BRAM1                 |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/RBMON.I0/BRAM1/UMEM            |
| ++RB_SRES_OR       |           | 112/112       | 0/0           | 265/265       | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/RB_SRES_OR                     |
| ++RLBMUX           |           | 9/9           | 0/0           | 14/14         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/RLBMUX                         |
| ++SERPORT          |           | 2/82          | 1/150         | 2/208         | 0/32          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT                        |
| +++RXFIFO          |           | 1/14          | 0/12          | 1/38          | 0/16          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/RXFIFO                 |
| ++++FIFO           |           | 8/13          | 12/12         | 20/37         | 0/16          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/RXFIFO/FIFO            |
| +++++RAM           |           | 5/5           | 0/0           | 17/17         | 16/16         | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/RXFIFO/FIFO/RAM        |
| +++TXFIFO          |           | 2/15          | 0/12          | 2/40          | 0/16          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/TXFIFO                 |
| ++++FIFO           |           | 7/13          | 12/12         | 16/38         | 0/16          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/TXFIFO/FIFO            |
| +++++RAM           |           | 6/6           | 0/0           | 22/22         | 16/16         | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/TXFIFO/FIFO/RAM        |
| +++UART            |           | 0/40          | 0/95          | 0/114         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/UART                   |
| ++++AB             |           | 10/10         | 26/26         | 26/26         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/UART/AB                |
| ++++RXTX           |           | 0/30          | 0/69          | 0/88          | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/UART/RXTX              |
| +++++RX            |           | 21/21         | 42/42         | 59/59         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/UART/RXTX/RX           |
| +++++TX            |           | 9/9           | 27/27         | 29/29         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/UART/RXTX/TX           |
| +++XONRX           |           | 5/5           | 10/10         | 4/4           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/XONRX                  |
| +++XONTX           |           | 6/6           | 20/20         | 10/10         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/RLINK/SERPORT/XONTX                  |
| +SRAM_CTL          |           | 31/31         | 50/50         | 43/43         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL                             |
| ++IOB_MEM_ADDR0    |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_ADDR0               |
| +++IOB             |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_ADDR0/IOB           |
| ++IOB_MEM_ADDRH    |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_ADDRH               |
| ++IOB_MEM_BE       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_BE                  |
| ++IOB_MEM_CE       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_CE                  |
| +++IOB             |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_CE/IOB              |
| ++IOB_MEM_DATA     |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_DATA                |
| ++IOB_MEM_OE       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_OE                  |
| +++IOB             |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_OE/IOB              |
| ++IOB_MEM_WE       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_WE                  |
| +++IOB             |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SRAM_CTL/IOB_MEM_WE/IOB              |
| +SYS70             |           | 1/1558        | 0/1016        | 0/2933        | 0/76          | 0/11      | 0/1     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70                                |
| ++CACHE            |           | 66/66         | 43/43         | 81/81         | 0/0           | 0/5       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE                          |
| +++CMEM_DAT0       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_DAT0                |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_DAT0/UMEM           |
| +++CMEM_DAT1       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_DAT1                |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_DAT1/UMEM           |
| +++CMEM_DAT2       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_DAT2                |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_DAT2/UMEM           |
| +++CMEM_DAT3       |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_DAT3                |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_DAT3/UMEM           |
| +++CMEM_TAG        |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_TAG                 |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/CACHE/CMEM_TAG/UMEM            |
| ++DMCMON.I0        |           | 126/130       | 207/207       | 165/181       | 0/16          | 0/2       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMCMON.I0                      |
| +++BRAM0           |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMCMON.I0/BRAM0                |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMCMON.I0/BRAM0/UMEM           |
| +++BRAM1           |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMCMON.I0/BRAM1                |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMCMON.I0/BRAM1/UMEM           |
| +++MAL             |           | 4/4           | 0/0           | 16/16         | 16/16         | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMCMON.I0/MAL                  |
| ++DMHBPT.I0        |           | 5/54          | 0/78          | 5/61          | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMHBPT.I0                      |
| +++GU[0].HBPT      |           | 23/23         | 39/39         | 26/26         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMHBPT.I0/GU[0].HBPT           |
| +++GU[1].HBPT      |           | 26/26         | 39/39         | 30/30         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMHBPT.I0/GU[1].HBPT           |
| ++DMSCNT.I0        |           | 38/38         | 91/91         | 82/82         | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMSCNT.I0                      |
| +++CMEM            |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMSCNT.I0/CMEM                 |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/DMSCNT.I0/CMEM/UMEM            |
| ++IBMON.I0         |           | 47/47         | 106/106       | 86/86         | 0/0           | 0/2       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/IBMON.I0                       |
| +++BRAM0           |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/IBMON.I0/BRAM0                 |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/IBMON.I0/BRAM0/UMEM            |
| +++BRAM1           |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/IBMON.I0/BRAM1                 |
| ++++UMEM           |           | 0/0           | 0/0           | 0/0           | 0/0           | 1/1       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/IBMON.I0/BRAM1/UMEM            |
| ++IB_SRES_OR       |           | 5/5           | 0/0           | 6/6           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/IB_SRES_OR                     |
| ++MEM70            |           | 9/9           | 16/16         | 4/4           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/MEM70                          |
| ++RB2CP            |           | 36/36         | 40/40         | 65/65         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/RB2CP                          |
| ++RB_SRES_OR       |           | 4/4           | 0/0           | 4/4           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/RB_SRES_OR                     |
| ++W11A             |           | 0/1168        | 0/435         | 0/2363        | 0/60          | 1/1       | 0/1     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A                           |
| +++DPATH           |           | 119/325       | 84/144        | 218/658       | 0/20          | 0/0       | 0/1     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH                     |
| ++++AUNIT          |           | 18/18         | 0/0           | 38/38         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/AUNIT               |
| ++++GPR            |           | 25/30         | 16/16         | 54/74         | 0/20          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/GPR                 |
| +++++GPR_HIGH      |           | 2/2           | 0/0           | 8/8           | 8/8           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/GPR/GPR_HIGH        |
| +++++GPR_LOW       |           | 3/3           | 0/0           | 12/12         | 12/12         | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/GPR/GPR_LOW         |
| ++++LUNIT          |           | 24/24         | 0/0           | 69/69         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/LUNIT               |
| ++++MUNIT          |           | 54/54         | 30/30         | 104/104       | 0/0           | 0/0       | 1/1     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/MUNIT               |
| ++++OUNIT          |           | 48/48         | 0/0           | 98/98         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/OUNIT               |
| ++++PSR            |           | 30/32         | 13/14         | 55/57         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/PSR                 |
| +++++SEL           |           | 2/2           | 1/1           | 2/2           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/DPATH/PSR/SEL             |
| +++IB_SRES_OR      |           | 1/1           | 0/0           | 2/2           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/IB_SRES_OR                |
| +++IDEC            |           | 57/57         | 0/0           | 111/111       | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/IDEC                      |
| +++IRQ             |           | 13/15         | 7/8           | 22/23         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/IRQ                       |
| ++++SEL            |           | 2/2           | 1/1           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/IRQ/SEL                   |
| +++REG70           |           | 5/5           | 10/10         | 4/4           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/REG70                     |
| +++SEQ             |           | 320/322       | 120/121       | 731/734       | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/SEQ                       |
| ++++SEL            |           | 2/2           | 1/1           | 3/3           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/SEQ/SEL                   |
| +++VMBOX           |           | 145/443       | 94/152        | 246/831       | 0/40          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX                     |
| ++++MMU            |           | 31/85         | 18/56         | 53/139        | 0/29          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU                 |
| +++++SADR          |           | 16/28         | 2/2           | 17/46         | 0/29          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SADR            |
| ++++++SAR_HIGH     |           | 3/3           | 0/0           | 8/8           | 8/8           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SADR/SAR_HIGH   |
| ++++++SAR_LOW      |           | 3/3           | 0/0           | 8/8           | 8/8           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SADR/SAR_LOW    |
| ++++++SDR_AIB      |           | 1/1           | 0/0           | 2/2           | 2/2           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SADR/SDR_AIB    |
| ++++++SDR_LOW      |           | 1/1           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SADR/SDR_LOW    |
| ++++++SDR_SLF      |           | 4/4           | 0/0           | 7/7           | 7/7           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SADR/SDR_SLF    |
| +++++SEL_SSR0      |           | 2/2           | 1/1           | 3/3           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SEL_SSR0        |
| +++++SEL_SSR3      |           | 1/1           | 1/1           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SEL_SSR3        |
| +++++SRES_OR       |           | 1/1           | 0/0           | 2/2           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SRES_OR         |
| +++++SSR12         |           | 19/22         | 32/34         | 31/34         | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SSR12           |
| ++++++SEL_SSR1     |           | 2/2           | 1/1           | 3/3           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SSR12/SEL_SSR1  |
| ++++++SEL_SSR2     |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/MMU/SSR12/SEL_SSR2  |
| ++++SEL            |           | 4/4           | 1/1           | 4/4           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/SEL                 |
| ++++SRES_OR_ALL    |           | 193/193       | 0/0           | 403/403       | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/SRES_OR_ALL         |
| ++++UBMAP          |           | 12/16         | 0/1           | 26/39         | 0/11          | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/UBMAP               |
| +++++MAP_0         |           | 1/1           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/UBMAP/MAP_0         |
| +++++MAP_1         |           | 1/1           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/UBMAP/MAP_1         |
| +++++MAP_2         |           | 1/1           | 0/0           | 4/4           | 3/3           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/UBMAP/MAP_2         |
| +++++SEL           |           | 1/1           | 1/1           | 1/1           | 0/0           | 0/0       | 0/0     | 0/0   | 0/0   | 0/0   | 0/0   | 0/0       | sys_w11a_n3/SYS70/W11A/VMBOX/UBMAP/SEL           |
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

* Slices can be packed with basic elements from multiple hierarchies.
  Therefore, a slice will be counted in every hierarchical module
  that each of its packed basic elements belong to.
** For each column, there are two numbers reported <A>/<B>.
   <A> is the number of elements that belong to that specific hierarchical module.
   <B> is the total number of elements from that hierarchical module and any lower level
   hierarchical modules below.
*** The LUTRAM column counts all LUTs used as memory including RAM, ROM, and shift registers.
