1: /* 2: * DN-11 ACU interface 3: */ 4: 5: #include "../h/param.h" 6: #include "../h/dir.h" 7: #include "../h/user.h" 8: 9: struct device { 10: int dn_reg[4]; 11: }; 12: 13: struct device *dn_addr[] = { (struct device *)0175200 }; 14: #define NDN 4 15: 16: #define PWI 0100000 17: #define ACR 040000 18: #define DLO 010000 19: #define DONE 0200 20: #define IENABLE 0100 21: #define DSS 040 22: #define PND 020 23: #define MENABLE 04 24: #define DPR 02 25: #define CRQ 01 26: 27: #define DNPRI (PZERO+5) 28: 29: dnopen(dev) 30: register dev; 31: { 32: register struct device *dp; 33: 34: dev = minor(dev); 35: if (dev >= NDN || 36: (dp = dn_addr[dev>>2])->dn_reg[dev&03]&(PWI|DLO|CRQ)) 37: u.u_error = ENXIO; 38: else { 39: dp->dn_reg[0] |= MENABLE; 40: dp->dn_reg[dev&03] = IENABLE|MENABLE|CRQ; 41: } 42: } 43: 44: dnclose(dev) 45: { 46: dev = minor(dev); 47: dn_addr[dev>>2]->dn_reg[dev&03] = MENABLE; 48: } 49: 50: dnwrite(dev) 51: { 52: register c; 53: register *dp; 54: extern lbolt; 55: 56: dev = minor(dev); 57: dp = &(dn_addr[dev>>2]->dn_reg[dev&03]); 58: while ((*dp & (PWI|ACR|DSS)) == 0) { 59: spl4(); 60: if ((*dp&PND) == 0 || u.u_count == 0 || (c=cpass()) < 0) 61: sleep((caddr_t)dp, DNPRI); 62: else if (c == '-') { 63: sleep((caddr_t)&lbolt, DNPRI); 64: sleep((caddr_t)&lbolt, DNPRI); 65: } else { 66: *dp = (c<<8)|IENABLE|MENABLE|DPR|CRQ; 67: sleep((caddr_t)dp, DNPRI); 68: } 69: spl0(); 70: } 71: if (*dp&(PWI|ACR)) 72: u.u_error = EIO; 73: } 74: 75: /* 76: * interrupt-- "dev" applies to 77: * system unit number, not minor device 78: */ 79: dnint(dev) 80: { 81: register *dp,*ep; 82: 83: dp = &(dn_addr[dev]->dn_reg[0]); 84: *dp &= ~MENABLE; 85: for (ep=dp; ep<dp+4; ep++) 86: if (*ep&DONE) { 87: *ep &= ~DONE; 88: wakeup((caddr_t)ep); 89: } 90: *dp |= MENABLE; 91: }