1: struct dhdevice
   2: {
   3:     union {
   4:         short   dhcsr;      /* control-status register */
   5:         char    dhcsrl;     /* low byte for line select */
   6:     } un;
   7:     short   dhrcr;          /* receive character register */
   8:     short   dhlpr;          /* line parameter register */
   9:     char    *dhcar;         /* current address register */
  10:     short   dhbcr;          /* byte count register */
  11:     u_short dhbar;          /* buffer active register */
  12:     short   dhbreak;        /* break control register */
  13:     short   dhsilo;         /* silo status register */
  14: };
  15: 
  16: /* Bits in dhcsr */
  17: #define DH_TI   0100000     /* transmit interrupt */
  18: #define DH_SI   0040000     /* storage interrupt */
  19: #define DH_TIE  0020000     /* transmit interrupt enable */
  20: #define DH_SIE  0010000     /* storage interrupt enable */
  21: #define DH_MC   0004000     /* master clear */
  22: #define DH_NXM  0002000     /* non-existent memory */
  23: #define DH_MM   0001000     /* maintenance mode */
  24: #define DH_CNI  0000400     /* clear non-existent memory interrupt */
  25: #define DH_RI   0000200     /* receiver interrupt */
  26: #define DH_RIE  0000100     /* receiver interrupt enable */
  27: 
  28: /* Bits in dhlpr */
  29: #define BITS6   01
  30: #define BITS7   02
  31: #define BITS8   03
  32: #define TWOSB   04
  33: #define PENABLE 020
  34: /* Some DEC manuals incorrectly say this bit causes generation of even parity. */
  35: #define OPAR    040
  36: #define HDUPLX  040000
  37: 
  38: #ifdef  DH_SILO
  39: #define DH_IE   (DH_TIE|DH_SIE|DH_RIE)
  40: #else
  41: #define DH_IE   (DH_TIE|DH_RIE)
  42: #endif
  43: 
  44: /* Bits in dhrcr */
  45: #define DH_PE       0010000     /* parity error */
  46: #define DH_FE       0020000     /* framing error */
  47: #define DH_DO       0040000     /* data overrun */
  48: 
  49: struct dmdevice
  50: {
  51:     short   dmcsr;      /* control status register */
  52:     short   dmlstat;    /* line status register */
  53:     short   dmpad1[2];
  54: };
  55: 
  56: /* bits in dm csr */
  57: #define DM_RF       0100000     /* ring flag */
  58: #define DM_CF       0040000     /* carrier flag */
  59: #define DM_CTS      0020000     /* clear to send */
  60: #define DM_SRF      0010000     /* secondary receive flag */
  61: #define DM_CS       0004000     /* clear scan */
  62: #define DM_CM       0002000     /* clear multiplexor */
  63: #define DM_MM       0001000     /* maintenance mode */
  64: #define DM_STP      0000400     /* step */
  65: #define DM_DONE     0000200     /* scanner is done */
  66: #define DM_IE       0000100     /* interrupt enable */
  67: #define DM_SE       0000040     /* scan enable */
  68: #define DM_BUSY     0000020     /* scan busy */
  69: 
  70: /* bits in dm lsr */
  71: #define DML_RNG     0000200     /* ring */
  72: #define DML_CAR     0000100     /* carrier detect */
  73: #define DML_CTS     0000040     /* clear to send */
  74: #define DML_SR      0000020     /* secondary receive */
  75: #define DML_ST      0000010     /* secondary transmit */
  76: #define DML_RTS     0000004     /* request to send */
  77: #define DML_DTR     0000002     /* data terminal ready */
  78: #define DML_LE      0000001     /* line enable */
  79: 
  80: #define DML_ON      (DML_DTR|DML_RTS|DML_LE)
  81: #define DML_OFF     (DML_LE)
  82: 
  83: /* dmctl actions */
  84: #define DMSET       0
  85: #define DMBIS       1
  86: #define DMBIC       2

Defined struct's

dhdevice defined in line 1; used 32 times
dmdevice defined in line 49; used 10 times

Defined macros

BITS6 defined in line 29; used 1 times
BITS7 defined in line 30; used 1 times
BITS8 defined in line 31; used 1 times
DH_CNI defined in line 24; used 1 times
DH_DO defined in line 47; used 1 times
DH_FE defined in line 46; used 2 times
DH_IE defined in line 41; used 7 times
DH_MC defined in line 21; never used
DH_MM defined in line 23; never used
DH_NXM defined in line 22; used 1 times
DH_PE defined in line 45; used 2 times
DH_RI defined in line 25; never used
DH_RIE defined in line 26; used 2 times
DH_SI defined in line 18; never used
DH_SIE defined in line 20; used 1 times
  • in line 39
DH_TI defined in line 17; used 1 times
DH_TIE defined in line 19; used 3 times
DMBIC defined in line 86; used 1 times
DMBIS defined in line 85; used 1 times
DML_CAR defined in line 72; used 3 times
DML_CTS defined in line 73; never used
DML_DTR defined in line 77; used 3 times
DML_LE defined in line 78; used 2 times
DML_OFF defined in line 81; used 2 times
DML_ON defined in line 80; used 1 times
DML_RNG defined in line 71; never used
DML_RTS defined in line 76; used 3 times
DML_SR defined in line 74; used 1 times
DML_ST defined in line 75; never used
DMSET defined in line 84; used 2 times
DM_BUSY defined in line 68; used 2 times
DM_CF defined in line 58; used 1 times
DM_CM defined in line 62; never used
DM_CS defined in line 61; never used
DM_CTS defined in line 59; never used
DM_DONE defined in line 65; used 2 times
DM_IE defined in line 66; used 5 times
DM_MM defined in line 63; never used
DM_RF defined in line 57; never used
DM_SE defined in line 67; used 6 times
DM_SRF defined in line 60; never used
DM_STP defined in line 64; never used
HDUPLX defined in line 36; used 1 times
OPAR defined in line 35; used 1 times
PENABLE defined in line 33; used 2 times
TWOSB defined in line 32; used 1 times

Usage of this include

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