G arty_dummy arty_dummy I_CLK100 O_TXD I_RXD O_LED I_SWI O_RGBLED0 I_BTN O_RGBLED1 A_VPWRN O_RGBLED2 A_VPWRP O_RGBLED3 bp_rs232_2l4l_iob bp_rs232_2l4l_iob CLK RXD RESET CTS_N SEL O_TXD0 TXD O_TXD1 RTS_N O_RTS1_N I_RXD0 I_RXD1 I_CTS1_N bp_rs232_2line_iob bp_rs232_2line_iob CLK RXD TXD O_TXD I_RXD bp_rs232_2l4l_iob:bp_rs232_2l4l_iob->bp_rs232_2line_iob:bp_rs232_2line_iob bp_rs232_4line_iob bp_rs232_4line_iob CLK RXD TXD CTS_N RTS_N O_TXD I_RXD O_RTS_N I_CTS_N bp_rs232_2l4l_iob:bp_rs232_2l4l_iob->bp_rs232_4line_iob:bp_rs232_4line_iob iob_reg_i iob_reg_i CLK DI CE PAD bp_rs232_2line_iob:bp_rs232_2line_iob->iob_reg_i:iob_reg_i iob_reg_o iob_reg_o CLK PAD CE DO bp_rs232_2line_iob:bp_rs232_2line_iob->iob_reg_o:iob_reg_o bp_rs232_4line_iob:bp_rs232_4line_iob->iob_reg_i:iob_reg_i bp_rs232_4line_iob:bp_rs232_4line_iob->iob_reg_o:iob_reg_o iob_reg_i_gen iob_reg_i_gen CLK DI CE PAD iob_reg_i:iob_reg_i->iob_reg_i_gen:iob_reg_i_gen iob_reg_o_gen iob_reg_o_gen CLK PAD CE DO iob_reg_o:iob_reg_o->iob_reg_o_gen:iob_reg_o_gen bp_swibtnled bp_swibtnled CLK SWI RESET BTN CE_MSEC O_LED LED I_SWI I_BTN bp_swibtnled:bp_swibtnled->iob_reg_i_gen:iob_reg_i_gen bp_swibtnled:bp_swibtnled->iob_reg_o_gen:iob_reg_o_gen debounce_gen debounce_gen CLK DO RESET CE_INT DI bp_swibtnled:bp_swibtnled->debounce_gen:debounce_gen byte2cdata byte2cdata CLK BUSY RESET DO DI VAL ENA ERR HOLD byte2word byte2word CLK BUSY RESET DO DI VAL ENA ODD HOLD cdata2byte cdata2byte CLK BUSY RESET DO ESCXON VAL ESCFILL DI ENA HOLD cdc_pulse cdc_pulse CLKM BUSY RESET POUT CLKS PIN clkdivce clkdivce CLK CE_USEC CE_MSEC crc16 crc16 CLK CRC RESET ENA DI dcm_sfs dcm_sfs CLKIN CLKFX LOCKED fifo_1c_dram fifo_1c_dram CLK BUSY RESET DO DI VAL ENA SIZE HOLD fifo_1c_dram_raw fifo_1c_dram_raw CLK DO RESET SIZE WE EMPTY RE FULL DI fifo_1c_dram:fifo_1c_dram->fifo_1c_dram_raw:fifo_1c_dram_raw ram_1swar_1ar_gen ram_1swar_1ar_gen CLK DOA WE DOB ADDRA ADDRB DI fifo_1c_dram_raw:fifo_1c_dram_raw->ram_1swar_1ar_gen:ram_1swar_1ar_gen fifo_2c_dram fifo_2c_dram CLKW BUSY CLKR DO RESETW VAL RESETR SIZEW DI SIZER ENA HOLD fifo_2c_dram:fifo_2c_dram->ram_1swar_1ar_gen:ram_1swar_1ar_gen gray_cnt_gen gray_cnt_gen CLK DATA RESET CE fifo_2c_dram:fifo_2c_dram->gray_cnt_gen:gray_cnt_gen gray2bin_gen gray2bin_gen DI DO fifo_2c_dram:fifo_2c_dram->gray2bin_gen:gray2bin_gen gray_cnt_4 gray_cnt_4 CLK DATA RESET CE gray_cnt_gen:gray_cnt_gen->gray_cnt_4:gray_cnt_4 gray_cnt_5 gray_cnt_5 CLK DATA RESET CE gray_cnt_gen:gray_cnt_gen->gray_cnt_5:gray_cnt_5 gray_cnt_n gray_cnt_n CLK DATA RESET CE gray_cnt_gen:gray_cnt_gen->gray_cnt_n:gray_cnt_n fx2_2fifo_core fx2_2fifo_core CLK RXBUSY RESET TXDATA RXDATA TXVAL RXENA IFCLK FIFO FLAG SLRD_N DATA SLWR_N SLOE_N PKTEND_N fx2_2fifo_core:fx2_2fifo_core->fifo_2c_dram:fifo_2c_dram fx2_2fifoctl_ic fx2_2fifoctl_ic CLK RXDATA RESET RXVAL RXHOLD RXAEMPTY TXDATA TXBUSY TXENA TXAFULL I_FX2_IFCLK MONI I_FX2_FLAG O_FX2_FIFO O_FX2_SLRD_N O_FX2_SLWR_N O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA fx2_2fifoctl_ic:fx2_2fifoctl_ic->iob_reg_o:iob_reg_o fx2_2fifoctl_ic:fx2_2fifoctl_ic->iob_reg_i_gen:iob_reg_i_gen fx2_2fifoctl_ic:fx2_2fifoctl_ic->iob_reg_o_gen:iob_reg_o_gen fx2_2fifoctl_ic:fx2_2fifoctl_ic->fifo_2c_dram:fifo_2c_dram iob_reg_io_gen iob_reg_io_gen CLK DI CEI PAD CEO OE DO fx2_2fifoctl_ic:fx2_2fifoctl_ic->iob_reg_io_gen:iob_reg_io_gen iob_keeper_gen iob_keeper_gen PAD iob_reg_io_gen:iob_reg_io_gen->iob_keeper_gen:iob_keeper_gen fx2_3fifoctl_ic fx2_3fifoctl_ic CLK RXDATA RESET RXVAL RXHOLD RXAEMPTY TXDATA TXBUSY TXENA TXAFULL TX2DATA TX2BUSY TX2ENA TX2AFULL I_FX2_IFCLK MONI I_FX2_FLAG O_FX2_FIFO O_FX2_SLRD_N O_FX2_SLWR_N O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA fx2_3fifoctl_ic:fx2_3fifoctl_ic->iob_reg_o:iob_reg_o fx2_3fifoctl_ic:fx2_3fifoctl_ic->iob_reg_i_gen:iob_reg_i_gen fx2_3fifoctl_ic:fx2_3fifoctl_ic->iob_reg_o_gen:iob_reg_o_gen fx2_3fifoctl_ic:fx2_3fifoctl_ic->fifo_2c_dram:fifo_2c_dram fx2_3fifoctl_ic:fx2_3fifoctl_ic->iob_reg_io_gen:iob_reg_io_gen ib_intmap ib_intmap EI_REQ EI_ACK EI_ACKM EI_PRI EI_VECT ib_sel ib_sel CLK SEL IB_MREQ ib_sres_or_2 ib_sres_or_2 IB_SRES_1 IB_SRES_OR IB_SRES_2 ib_sres_or_mon ib_sres_or_mon IB_SRES_1 IB_SRES_2 IB_SRES_3 IB_SRES_4 ib_sres_or_2:ib_sres_or_2->ib_sres_or_mon:ib_sres_or_mon ib_sres_or_3 ib_sres_or_3 IB_SRES_1 IB_SRES_OR IB_SRES_2 IB_SRES_3 ib_sres_or_3:ib_sres_or_3->ib_sres_or_mon:ib_sres_or_mon ib_sres_or_4 ib_sres_or_4 IB_SRES_1 IB_SRES_OR IB_SRES_2 IB_SRES_3 IB_SRES_4 ib_sres_or_4:ib_sres_or_4->ib_sres_or_mon:ib_sres_or_mon ibd_ibmon ibd_ibmon CLK IB_SRES RESET IB_MREQ IB_SRES_SUM ram_1swsr_wfirst_gen ram_1swsr_wfirst_gen CLK DO EN WE ADDR DI ibd_ibmon:ibd_ibmon->ram_1swsr_wfirst_gen:ram_1swsr_wfirst_gen ram_1swsr_xfirst_gen_unisim ram_1swsr_xfirst_gen_unisim CLK DO EN WE ADDR DI ram_1swsr_wfirst_gen:ram_1swsr_wfirst_gen->ram_1swsr_xfirst_gen_unisim:ram_1swsr_xfirst_gen_unisim ibd_iist ibd_iist CLK IB_SRES CE_USEC EI_REQ RESET IIST_OUT BRESET IIST_MREQ IB_MREQ EI_ACK IIST_BUS IIST_SRES ibd_kw11l ibd_kw11l CLK IB_SRES CE_MSEC EI_REQ RESET BRESET CPUSUSP IB_MREQ EI_ACK ibdr_dl11 ibdr_dl11 CLK RB_LAM CE_USEC IB_SRES RESET EI_REQ_RX BRESET EI_REQ_TX IB_MREQ EI_ACK_RX EI_ACK_TX ibdr_lp11 ibdr_lp11 CLK RB_LAM RESET IB_SRES BRESET EI_REQ IB_MREQ EI_ACK ibdr_maxisys ibdr_maxisys CLK RB_LAM CE_USEC IB_SRES CE_MSEC EI_PRI RESET EI_VECT BRESET DISPREG ITIMER CPUSUSP IB_MREQ EI_ACKM ibdr_maxisys:ibdr_maxisys->ib_intmap:ib_intmap ibdr_maxisys:ibdr_maxisys->ib_sres_or_3:ib_sres_or_3 ibdr_maxisys:ibdr_maxisys->ib_sres_or_4:ib_sres_or_4 ibdr_maxisys:ibdr_maxisys->ibd_iist:ibd_iist ibdr_maxisys:ibdr_maxisys->ibd_kw11l:ibd_kw11l ibdr_maxisys:ibdr_maxisys->ibdr_dl11:ibdr_dl11 ibdr_maxisys:ibdr_maxisys->ibdr_lp11:ibdr_lp11 ibdr_rhrp ibdr_rhrp CLK RB_LAM CE_USEC IB_SRES BRESET EI_REQ ITIMER IB_MREQ EI_ACK ibdr_maxisys:ibdr_maxisys->ibdr_rhrp:ibdr_rhrp ibdr_rl11 ibdr_rl11 CLK RB_LAM CE_MSEC IB_SRES BRESET EI_REQ IB_MREQ EI_ACK ibdr_maxisys:ibdr_maxisys->ibdr_rl11:ibdr_rl11 ibdr_rk11 ibdr_rk11 CLK RB_LAM CE_MSEC IB_SRES BRESET EI_REQ IB_MREQ EI_ACK ibdr_maxisys:ibdr_maxisys->ibdr_rk11:ibdr_rk11 ibdr_tm11 ibdr_tm11 CLK RB_LAM BRESET IB_SRES IB_MREQ EI_REQ EI_ACK ibdr_maxisys:ibdr_maxisys->ibdr_tm11:ibdr_tm11 ibdr_pc11 ibdr_pc11 CLK RB_LAM RESET IB_SRES BRESET EI_REQ_PTR IB_MREQ EI_REQ_PTP EI_ACK_PTR EI_ACK_PTP ibdr_maxisys:ibdr_maxisys->ibdr_pc11:ibdr_pc11 ibdr_sdreg ibdr_sdreg CLK IB_SRES RESET DISPREG IB_MREQ ibdr_maxisys:ibdr_maxisys->ibdr_sdreg:ibdr_sdreg ram_1swar_gen ram_1swar_gen CLK DO WE ADDR DI ibdr_rhrp:ibdr_rhrp->ram_1swar_gen:ram_1swar_gen ibdr_rl11:ibdr_rl11->ram_1swar_gen:ram_1swar_gen ibdr_rk11:ibdr_rk11->ram_1swar_gen:ram_1swar_gen ibdr_minisys ibdr_minisys CLK RB_LAM CE_USEC IB_SRES CE_MSEC EI_PRI RESET EI_VECT BRESET DISPREG IB_MREQ EI_ACKM ibdr_minisys:ibdr_minisys->ib_intmap:ib_intmap ibdr_minisys:ibdr_minisys->ib_sres_or_4:ib_sres_or_4 ibdr_minisys:ibdr_minisys->ibd_kw11l:ibd_kw11l ibdr_minisys:ibdr_minisys->ibdr_dl11:ibdr_dl11 ibdr_minisys:ibdr_minisys->ibdr_rk11:ibdr_rk11 ibdr_minisys:ibdr_minisys->ibdr_sdreg:ibdr_sdreg ioleds_sp1c ioleds_sp1c SER_MONI IOLEDS ioleds_sp1c_fx2 ioleds_sp1c_fx2 CLK IOLEDS CE_USEC RESET ENAFX2 RB_SRES RLB_MONI SER_MONI led_pulse_stretch led_pulse_stretch CLK POUT CE_INT RESET DIN ioleds_sp1c_fx2:ioleds_sp1c_fx2->led_pulse_stretch:led_pulse_stretch is61lv25616al is61lv25616al CE_N DATA OE_N WE_N UB_N LB_N ADDR is61lv25616al_bank is61lv25616al_bank CE DATA OE WE BE ADDR is61lv25616al:is61lv25616al->is61lv25616al_bank:is61lv25616al_bank mt45w8mw16b mt45w8mw16b CLK MWAIT CE_N DATA OE_N WE_N UB_N LB_N ADV_N CRE ADDR nx_cram_dummy nx_cram_dummy I_MEM_WAIT O_MEM_CE_N O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA nx_cram_memctl_as nx_cram_memctl_as CLK BUSY RESET ACK_R REQ ACK_W WE ACT_R ADDR ACT_W BE DO DI O_MEM_CE_N I_MEM_WAIT O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA nx_cram_memctl_as:nx_cram_memctl_as->iob_reg_o:iob_reg_o nx_cram_memctl_as:nx_cram_memctl_as->iob_reg_o_gen:iob_reg_o_gen nx_cram_memctl_as:nx_cram_memctl_as->iob_reg_io_gen:iob_reg_io_gen pdp11_aunit pdp11_aunit DSRC DOUT DDST CCOUT CI SRCMOD DSTMOD CIMOD CC1OP CCMODE BYTOP pdp11_bram pdp11_bram CLK EM_SRES GRESET EM_MREQ ram_2swsr_rfirst_gen ram_2swsr_rfirst_gen CLKA DOA CLKB DOB ENA ENB WEA WEB ADDRA ADDRB DIA DIB pdp11_bram:pdp11_bram->ram_2swsr_rfirst_gen:ram_2swsr_rfirst_gen ram_2swsr_xfirst_gen_unisim ram_2swsr_xfirst_gen_unisim CLKA DOA CLKB DOB ENA ENB WEA WEB ADDRA ADDRB DIA DIB ram_2swsr_rfirst_gen:ram_2swsr_rfirst_gen->ram_2swsr_xfirst_gen_unisim:ram_2swsr_xfirst_gen_unisim pdp11_bram_memctl pdp11_bram_memctl CLK BUSY RESET ACK_R REQ ACK_W WE ACT_R ADDR ACT_W BE DO DI pdp11_cache pdp11_cache CLK EM_SRES GRESET CHIT EM_MREQ MEM_REQ FMISS MEM_WE MEM_BUSY MEM_ADDR MEM_ACK_R MEM_BE MEM_DO MEM_DI pdp11_cache:pdp11_cache->ram_2swsr_rfirst_gen:ram_2swsr_rfirst_gen pdp11_core pdp11_core CLK CP_STAT RESET CP_DOUT CP_CNTL ESUSP_O CP_ADDR ITIMER CP_DIN EI_ACKM ESUSP_I EM_MREQ HBPT CRESET EI_PRI BRESET EI_VECT IB_MREQ_M EM_SRES DM_STAT_SE IB_SRES_M DM_STAT_DP DM_STAT_VM DM_STAT_CO pdp11_core:pdp11_core->ib_sres_or_4:ib_sres_or_4 pdp11_vmbox pdp11_vmbox CLK VM_STAT GRESET VM_DOUT CRESET EM_MREQ BRESET IB_MREQ_M CP_ADDR DM_STAT_VM VM_CNTL VM_ADDR VM_DIN EM_SRES MMU_MONI IB_SRES_CPU IB_SRES_EXT pdp11_core:pdp11_core->pdp11_vmbox:pdp11_vmbox pdp11_dpath pdp11_dpath CLK STAT CRESET CP_DOUT CNTL PSWOUT CP_DIN PCOUT VM_DOUT IREG IB_MREQ VM_ADDR VM_DIN IB_SRES DM_STAT_DP pdp11_core:pdp11_core->pdp11_dpath:pdp11_dpath pdp11_decode pdp11_decode IREG STAT pdp11_core:pdp11_core->pdp11_decode:pdp11_decode pdp11_sequencer pdp11_sequencer CLK INT_ACK GRESET CRESET PSW BRESET PC MMU_MONI IREG DP_CNTL ID_STAT VM_CNTL DP_STAT CP_STAT CP_CNTL ESUSP_O VM_STAT ITIMER INT_PRI IB_SRES INT_VECT DM_STAT_SE ESUSP_I HBPT IB_MREQ pdp11_core:pdp11_core->pdp11_sequencer:pdp11_sequencer pdp11_irq pdp11_irq CLK EI_ACKM BRESET PRI INT_ACK VECT EI_PRI IB_SRES EI_VECT IB_MREQ pdp11_core:pdp11_core->pdp11_irq:pdp11_irq pdp11_reg70 pdp11_reg70 CLK IB_SRES CRESET IB_MREQ pdp11_core:pdp11_core->pdp11_reg70:pdp11_reg70 pdp11_vmbox:pdp11_vmbox->ib_sres_or_2:ib_sres_or_2 pdp11_vmbox:pdp11_vmbox->ib_sres_or_4:ib_sres_or_4 pdp11_mmu pdp11_mmu CLK STAT CRESET PADDRH BRESET IB_SRES CNTL VADDR MONI IB_MREQ pdp11_vmbox:pdp11_vmbox->pdp11_mmu:pdp11_mmu pdp11_ubmap pdp11_ubmap CLK ADDR_PM MREQ IB_SRES ADDR_UB IB_MREQ pdp11_vmbox:pdp11_vmbox->pdp11_ubmap:pdp11_ubmap pdp11_dpath:pdp11_dpath->pdp11_aunit:pdp11_aunit pdp11_gpr pdp11_gpr CLK DSRC DIN DDST ASRC PC ADST MODE RSET WE BYTOP PCINC pdp11_dpath:pdp11_dpath->pdp11_gpr:pdp11_gpr pdp11_psr pdp11_psr CLK PSW CRESET IB_SRES DIN CCIN CCWE WE FUNC IB_MREQ pdp11_dpath:pdp11_dpath->pdp11_psr:pdp11_psr pdp11_ounit pdp11_ounit DSRC DOUT DDST NZOUT DTMP PC ASEL AZERO IREG8 VMDOUT CONST BSEL OPSUB pdp11_dpath:pdp11_dpath->pdp11_ounit:pdp11_ounit pdp11_lunit pdp11_lunit DSRC DOUT DDST CCOUT CCIN FUNC BYTOP pdp11_dpath:pdp11_dpath->pdp11_lunit:pdp11_lunit pdp11_munit pdp11_munit CLK SHC_TC DSRC DIV_CR DDST DIV_CQ DTMP DIV_QUIT GPR_DSRC DOUT FUNC DOUTE S_DIV CCOUT S_DIV_CN S_DIV_CR S_DIV_SR S_ASH S_ASH_CN S_ASHC S_ASHC_CN pdp11_dpath:pdp11_dpath->pdp11_munit:pdp11_munit pdp11_sequencer:pdp11_sequencer->ib_sel:ib_sel pdp11_irq:pdp11_irq->ib_sel:ib_sel pdp11_core_rbus pdp11_core_rbus CLK RB_SRES RESET RB_STAT RB_MREQ RB_LAM CP_STAT GRESET CP_DOUT CP_CNTL CP_ADDR CP_DIN pdp11_dmcmon pdp11_dmcmon CLK RB_SRES RESET RB_MREQ DM_STAT_SE DM_STAT_DP DM_STAT_VM DM_STAT_CO pdp11_dmcmon:pdp11_dmcmon->ram_1swar_1ar_gen:ram_1swar_1ar_gen pdp11_dmcmon:pdp11_dmcmon->ram_2swsr_rfirst_gen:ram_2swsr_rfirst_gen pdp11_dmhbpt pdp11_dmhbpt CLK RB_SRES RESET HBPT RB_MREQ DM_STAT_SE DM_STAT_DP DM_STAT_VM DM_STAT_CO pdp11_dmhbpt_unit pdp11_dmhbpt_unit CLK RB_SRES RESET HBPT RB_MREQ DM_STAT_SE DM_STAT_DP DM_STAT_VM DM_STAT_CO pdp11_dmhbpt:pdp11_dmhbpt->pdp11_dmhbpt_unit:pdp11_dmhbpt_unit rb_sres_or_4 rb_sres_or_4 RB_SRES_1 RB_SRES_OR RB_SRES_2 RB_SRES_3 RB_SRES_4 pdp11_dmhbpt:pdp11_dmhbpt->rb_sres_or_4:rb_sres_or_4 rb_sres_or_mon rb_sres_or_mon RB_SRES_1 RB_SRES_2 RB_SRES_3 RB_SRES_4 RB_SRES_5 RB_SRES_6 rb_sres_or_4:rb_sres_or_4->rb_sres_or_mon:rb_sres_or_mon pdp11_dmscnt pdp11_dmscnt CLK RB_SRES RESET RB_MREQ DM_STAT_SE DM_STAT_DP DM_STAT_CO pdp11_dmscnt:pdp11_dmscnt->ram_2swsr_rfirst_gen:ram_2swsr_rfirst_gen pdp11_gpr:pdp11_gpr->ram_1swar_1ar_gen:ram_1swar_1ar_gen pdp11_psr:pdp11_psr->ib_sel:ib_sel pdp11_dspmux pdp11_dspmux SEL DSP_DAT ABCLKDIV DM_STAT_DP DISPREG pdp11_hio70 pdp11_hio70 SEL_LED LED SEL_DSP DSP_DAT MEM_ACT_R MEM_ACT_W CP_STAT DM_STAT_DP ABCLKDIV DISPREG pdp11_hio70:pdp11_hio70->pdp11_dspmux:pdp11_dspmux pdp11_statleds pdp11_statleds MEM_ACT_R STATLEDS MEM_ACT_W CP_STAT DM_STAT_DP pdp11_hio70:pdp11_hio70->pdp11_statleds:pdp11_statleds pdp11_ledmux pdp11_ledmux SEL LED STATLEDS DM_STAT_DP pdp11_hio70:pdp11_hio70->pdp11_ledmux:pdp11_ledmux pdp11_hio70_arty pdp11_hio70_arty CLK LED MODE RGB_R MEM_ACT_R RGB_G MEM_ACT_W RGB_B CP_STAT DM_STAT_DP DISPREG IOLEDS ABCLKDIV pdp11_mem70 pdp11_mem70 CLK CACHE_FMISS CRESET IB_SRES HM_ENA HM_VAL IB_MREQ pdp11_mmu:pdp11_mmu->ib_sel:ib_sel pdp11_mmu:pdp11_mmu->ib_sres_or_3:ib_sres_or_3 pdp11_mmu_sadr pdp11_mmu_sadr CLK SARSDR MODE IB_SRES ASN AIB_WE AIB_SETA AIB_SETW IB_MREQ pdp11_mmu:pdp11_mmu->pdp11_mmu_sadr:pdp11_mmu_sadr pdp11_mmu_ssr12 pdp11_mmu_ssr12 CLK IB_SRES CRESET TRACE MONI IB_MREQ pdp11_mmu:pdp11_mmu->pdp11_mmu_ssr12:pdp11_mmu_ssr12 pdp11_mmu_sadr:pdp11_mmu_sadr->ram_1swar_gen:ram_1swar_gen pdp11_mmu_ssr12:pdp11_mmu_ssr12->ib_sel:ib_sel pdp11_sys70 pdp11_sys70 CLK RB_SRES RESET RB_STAT RB_MREQ RB_LAM_CPU EI_PRI GRESET EI_VECT CRESET IB_SRES BRESET MEM_BUSY CP_STAT MEM_ACK_R EI_ACKM MEM_DO ITIMER IB_MREQ MEM_REQ MEM_WE MEM_ADDR MEM_BE MEM_DI DM_STAT_DP pdp11_sys70:pdp11_sys70->ib_sres_or_3:ib_sres_or_3 pdp11_sys70:pdp11_sys70->ibd_ibmon:ibd_ibmon pdp11_sys70:pdp11_sys70->pdp11_cache:pdp11_cache pdp11_sys70:pdp11_sys70->pdp11_core:pdp11_core pdp11_sys70:pdp11_sys70->pdp11_core_rbus:pdp11_core_rbus pdp11_sys70:pdp11_sys70->pdp11_dmcmon:pdp11_dmcmon pdp11_sys70:pdp11_sys70->pdp11_dmhbpt:pdp11_dmhbpt pdp11_sys70:pdp11_sys70->pdp11_dmscnt:pdp11_dmscnt pdp11_sys70:pdp11_sys70->pdp11_mem70:pdp11_mem70 pdp11_tmu_sb pdp11_tmu_sb CLK DM_STAT_DP DM_STAT_VM DM_STAT_CO DM_STAT_SY pdp11_sys70:pdp11_sys70->pdp11_tmu_sb:pdp11_tmu_sb pdp11_tmu pdp11_tmu CLK ENA DM_STAT_DP DM_STAT_VM DM_STAT_CO DM_STAT_SY pdp11_tmu_sb:pdp11_tmu_sb->pdp11_tmu:pdp11_tmu pdp11_ubmap:pdp11_ubmap->ib_sel:ib_sel pdp11_ubmap:pdp11_ubmap->ram_1swar_gen:ram_1swar_gen ram_2swsr_wfirst_gen ram_2swsr_wfirst_gen CLKA DOA CLKB DOB ENA ENB WEA WEB ADDRA ADDRB DIA DIB ram_2swsr_wfirst_gen:ram_2swsr_wfirst_gen->ram_2swsr_xfirst_gen_unisim:ram_2swsr_xfirst_gen_unisim rb_mon rb_mon CLK CLK_CYCLE ENA RB_MREQ RB_SRES RB_LAM RB_STAT rb_mon_sb rb_mon_sb CLK RB_MREQ RB_SRES RB_LAM RB_STAT rb_mon_sb:rb_mon_sb->rb_mon:rb_mon simclkcnt simclkcnt CLK CLK_CYCLE rb_mon_sb:rb_mon_sb->simclkcnt:simclkcnt rb_sel rb_sel CLK SEL RB_MREQ rb_sres_or_2 rb_sres_or_2 RB_SRES_1 RB_SRES_OR RB_SRES_2 rb_sres_or_2:rb_sres_or_2->rb_sres_or_mon:rb_sres_or_mon rb_sres_or_3 rb_sres_or_3 RB_SRES_1 RB_SRES_OR RB_SRES_2 RB_SRES_3 rb_sres_or_3:rb_sres_or_3->rb_sres_or_mon:rb_sres_or_mon rbd_bram rbd_bram CLK RB_SRES RESET RB_MREQ rbd_bram:rbd_bram->ram_1swsr_wfirst_gen:ram_1swsr_wfirst_gen rbd_eyemon rbd_eyemon CLK RB_SRES RESET RB_MREQ RXSD RXACT rbd_eyemon:rbd_eyemon->ram_2swsr_wfirst_gen:ram_2swsr_wfirst_gen rbd_rbmon rbd_rbmon CLK RB_SRES RESET RB_MREQ RB_SRES_SUM rbd_rbmon:rbd_rbmon->ram_1swsr_wfirst_gen:ram_1swsr_wfirst_gen rbd_tester rbd_tester CLK RB_SRES RESET RB_LAM RB_MREQ RB_STAT rbd_tester:rbd_tester->fifo_1c_dram_raw:fifo_1c_dram_raw rbd_timer rbd_timer CLK RB_SRES CE_USEC DONE RESET BUSY RB_MREQ rbd_tst_rlink rbd_tst_rlink CLK RB_SRES RESET RB_LAM CE_USEC RB_STAT RB_MREQ STAT RB_SRES_TOP RXSD RXACT rbd_tst_rlink:rbd_tst_rlink->rb_sres_or_4:rb_sres_or_4 rbd_tst_rlink:rbd_tst_rlink->rb_sres_or_3:rb_sres_or_3 rbd_tst_rlink:rbd_tst_rlink->rbd_bram:rbd_bram rbd_tst_rlink:rbd_tst_rlink->rbd_eyemon:rbd_eyemon rbd_tst_rlink:rbd_tst_rlink->rbd_rbmon:rbd_rbmon rbd_tst_rlink:rbd_tst_rlink->rbd_tester:rbd_tester rbd_tst_rlink:rbd_tst_rlink->rbd_timer:rbd_timer rgbdrv_3x4mux rgbdrv_3x4mux CLK O_RGBLED0 RESET O_RGBLED1 CE_USEC O_RGBLED2 DATR O_RGBLED3 DATG DATB rgbdrv_3x4mux:rgbdrv_3x4mux->iob_reg_o_gen:iob_reg_o_gen rgbdrv_analog rgbdrv_analog CLK O_RGBLED RESET RGBCNTL DIMCNTL DIMR DIMG DIMB rgbdrv_analog:rgbdrv_analog->iob_reg_o_gen:iob_reg_o_gen rgbdrv_analog_rbus rgbdrv_analog_rbus CLK RB_SRES RESET O_RGBLED RB_MREQ RGBCNTL DIMCNTL rgbdrv_analog_rbus:rgbdrv_analog_rbus->rgbdrv_analog:rgbdrv_analog rgbdrv_master rgbdrv_master CLK RGBCNTL RESET DIMCNTL CE_USEC rlink_cext_iface rlink_cext_iface CLK RX_DATA CLK_CYCLE RX_VAL RX_HOLD TX_DATA TX_ENA rlink_core rlink_core CLK RL_BUSY CE_INT RL_DO RESET RL_VAL RL_DI RL_MONI RL_ENA RB_MREQ RL_HOLD RB_SRES RB_LAM RB_STAT rlink_core:rlink_core->crc16:crc16 rlink_core:rlink_core->fifo_1c_dram:fifo_1c_dram rlink_core:rlink_core->ram_2swsr_rfirst_gen:ram_2swsr_rfirst_gen rlink_core:rlink_core->rb_mon_sb:rb_mon_sb rlink_core:rlink_core->rb_sel:rb_sel rlink_core:rlink_core->rb_sres_or_2:rb_sres_or_2 rlink_mon_sb rlink_mon_sb CLK RL_DI RL_ENA RL_BUSY RL_DO RL_VAL RL_HOLD rlink_core:rlink_core->rlink_mon_sb:rlink_mon_sb rlink_mon_sb:rlink_mon_sb->simclkcnt:simclkcnt rlink_mon rlink_mon CLK CLK_CYCLE ENA RL_DI RL_ENA RL_BUSY RL_DO RL_VAL RL_HOLD rlink_mon_sb:rlink_mon_sb->rlink_mon:rlink_mon rlink_core8 rlink_core8 CLK RLB_BUSY CE_INT RLB_DO RESET RLB_VAL ESCXON RL_MONI ESCFILL RB_MREQ RLB_DI RLB_ENA RLB_HOLD RB_SRES RB_LAM RB_STAT rlink_core8:rlink_core8->byte2cdata:byte2cdata rlink_core8:rlink_core8->cdata2byte:cdata2byte rlink_core8:rlink_core8->rlink_core:rlink_core rlink_rlbmux rlink_rlbmux SEL RLB_DI RLB_BUSY RLB_ENA RLB_DO RLB_HOLD RLB_VAL P0_RXHOLD P0_RXDATA P0_TXDATA P0_RXVAL P0_TXENA P0_TXBUSY P1_RXHOLD P1_RXDATA P1_TXDATA P1_RXVAL P1_TXENA P1_TXBUSY rlink_sp1c rlink_sp1c CLK TXSD CE_USEC RTS_N CE_MSEC RB_MREQ CE_INT RL_MONI RESET SER_MONI ENAXON ESCFILL RXSD CTS_N RB_SRES RB_LAM RB_STAT rlink_sp1c:rlink_sp1c->rbd_rbmon:rbd_rbmon rlink_sp1c:rlink_sp1c->rlink_core8:rlink_core8 serport_1clock serport_1clock CLK RXDATA CE_MSEC RXVAL RESET TXBUSY ENAXON MONI ENAESC TXSD RXHOLD RXRTS_N TXDATA TXENA RXSD TXCTS_N rlink_sp1c:rlink_sp1c->serport_1clock:serport_1clock serport_1clock:serport_1clock->fifo_1c_dram:fifo_1c_dram serport_uart_rxtx_ab serport_uart_rxtx_ab CLK RXDATA CE_MSEC RXVAL RESET RXERR RXSD RXACT TXDATA TXSD TXENA TXBUSY ABACT ABDONE ABCLKDIV ABCLKDIV_F serport_1clock:serport_1clock->serport_uart_rxtx_ab:serport_uart_rxtx_ab serport_xonrx serport_xonrx CLK RXDATA RESET RXVAL ENAXON RXOVR ENAESC TXOK UART_RXDATA UART_RXVAL RXHOLD serport_1clock:serport_1clock->serport_xonrx:serport_xonrx serport_xontx serport_xontx CLK UART_TXDATA RESET UART_TXENA ENAXON TXBUSY ENAESC UART_TXBUSY TXDATA TXENA RXOK TXOK serport_1clock:serport_1clock->serport_xontx:serport_xontx rlink_sp1c_fx2 rlink_sp1c_fx2 CLK TXSD CE_USEC RTS_N CE_MSEC RB_MREQ CE_INT RL_MONI RESET RLB_MONI ENAXON SER_MONI ENAFX2 FX2_MONI RXSD O_FX2_FIFO CTS_N O_FX2_SLRD_N RB_SRES O_FX2_SLWR_N RB_LAM O_FX2_SLOE_N RB_STAT O_FX2_PKTEND_N I_FX2_IFCLK IO_FX2_DATA I_FX2_FLAG rlink_sp1c_fx2:rlink_sp1c_fx2->fx2_2fifoctl_ic:fx2_2fifoctl_ic rlink_sp1c_fx2:rlink_sp1c_fx2->rb_sres_or_2:rb_sres_or_2 rlink_sp1c_fx2:rlink_sp1c_fx2->rbd_rbmon:rbd_rbmon rlink_sp1c_fx2:rlink_sp1c_fx2->rlink_core8:rlink_core8 rlink_sp1c_fx2:rlink_sp1c_fx2->rlink_rlbmux:rlink_rlbmux rlink_sp1c_fx2:rlink_sp1c_fx2->serport_1clock:serport_1clock s3_sram_dummy s3_sram_dummy O_MEM_CE_N O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADDR IO_MEM_DATA s3_sram_memctl s3_sram_memctl CLK BUSY RESET ACK_R REQ ACK_W WE ACT_R ADDR ACT_W BE DO DI O_MEM_CE_N O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADDR IO_MEM_DATA s3_sram_memctl:s3_sram_memctl->iob_reg_o:iob_reg_o s3_sram_memctl:s3_sram_memctl->iob_reg_o_gen:iob_reg_o_gen s3_sram_memctl:s3_sram_memctl->iob_reg_io_gen:iob_reg_io_gen s3board_fusp_dummy s3board_fusp_dummy I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_FUSP_CTS_N O_MEM_CE_N I_FUSP_RXD O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADDR IO_MEM_DATA O_FUSP_RTS_N O_FUSP_TXD s3board_fusp_dummy:s3board_fusp_dummy->s3_sram_dummy:s3_sram_dummy s6_cmt_sfs s6_cmt_sfs CLKIN CLKFX LOCKED s7_cmt_sfs s7_cmt_sfs CLKIN CLKFX LOCKED s7_cmt_sfs_tb s7_cmt_sfs_tb CLKIN CLKFX LOCKED serport_uart_autobaud serport_uart_autobaud CLK CLKDIV CE_MSEC CLKDIV_F RESET ACT RXSD DONE serport_uart_rxtx_ab:serport_uart_rxtx_ab->serport_uart_autobaud:serport_uart_autobaud serport_uart_rxtx serport_uart_rxtx CLK RXDATA RESET RXVAL CLKDIV RXERR RXSD RXACT TXDATA TXSD TXENA TXBUSY serport_uart_rxtx_ab:serport_uart_rxtx_ab->serport_uart_rxtx:serport_uart_rxtx serport_2clock serport_2clock CLKU RXDATA RESET RXVAL CLKS TXBUSY CES_MSEC MONI ENAXON TXSD ENAESC RXRTS_N RXHOLD TXDATA TXENA RXSD TXCTS_N serport_2clock:serport_2clock->cdc_pulse:cdc_pulse serport_2clock:serport_2clock->fifo_2c_dram:fifo_2c_dram serport_2clock:serport_2clock->serport_uart_rxtx_ab:serport_uart_rxtx_ab serport_2clock:serport_2clock->serport_xonrx:serport_xonrx serport_2clock:serport_2clock->serport_xontx:serport_xontx serport_master_tb serport_master_tb CLK RXDATA RESET RXVAL CLKDIV RXERR ENAXON TXBUSY ENAESC TXSD RXOK RXRTS_N TXDATA TXENA RXSD TXCTS_N serport_uart_rxtx_tb serport_uart_rxtx_tb CLK RXDATA RESET RXVAL CLKDIV RXERR RXSD RXACT TXDATA TXSD TXENA TXBUSY serport_master_tb:serport_master_tb->serport_uart_rxtx_tb:serport_uart_rxtx_tb serport_xonrx_tb serport_xonrx_tb CLK RXDATA RESET RXVAL ENAXON RXOVR ENAESC TXOK UART_RXDATA UART_RXVAL RXHOLD serport_master_tb:serport_master_tb->serport_xonrx_tb:serport_xonrx_tb serport_xontx_tb serport_xontx_tb CLK UART_TXDATA RESET UART_TXENA ENAXON TXBUSY ENAESC UART_TXBUSY TXDATA TXENA RXOK TXOK serport_master_tb:serport_master_tb->serport_xontx_tb:serport_xontx_tb serport_uart_rx_tb serport_uart_rx_tb CLK RXDATA RESET RXVAL CLKDIV RXERR RXSD RXACT serport_uart_rxtx_tb:serport_uart_rxtx_tb->serport_uart_rx_tb:serport_uart_rx_tb serport_uart_tx_tb serport_uart_tx_tb CLK TXSD RESET TXBUSY CLKDIV TXDATA TXENA serport_uart_rxtx_tb:serport_uart_rxtx_tb->serport_uart_tx_tb:serport_uart_tx_tb serport_uart_rx serport_uart_rx CLK RXDATA RESET RXVAL CLKDIV RXERR RXSD RXACT serport_uart_rxtx:serport_uart_rxtx->serport_uart_rx:serport_uart_rx serport_uart_tx serport_uart_tx CLK TXSD RESET TXBUSY CLKDIV TXDATA TXENA serport_uart_rxtx:serport_uart_rxtx->serport_uart_tx:serport_uart_tx simclk simclk CLK_STOP CLK sn_7segctl sn_7segctl CLK ANO_N DIN SEG_N DP sn_humanio sn_humanio CLK SWI RESET BTN CE_MSEC O_LED LED O_ANO_N DSP_DAT O_SEG_N DSP_DP I_SWI I_BTN sn_humanio:sn_humanio->bp_swibtnled:bp_swibtnled sn_humanio:sn_humanio->iob_reg_o_gen:iob_reg_o_gen sn_humanio:sn_humanio->sn_7segctl:sn_7segctl sn_humanio_demu sn_humanio_demu CLK SWI RESET BTN CE_MSEC O_LED LED DSP_DAT DSP_DP I_SWI I_BTN sn_humanio_demu:sn_humanio_demu->bp_swibtnled:bp_swibtnled sn_humanio_demu_rbus sn_humanio_demu_rbus CLK RB_SRES RESET SWI CE_MSEC BTN RB_MREQ O_LED LED DSP_DAT DSP_DP I_SWI I_BTN sn_humanio_demu_rbus:sn_humanio_demu_rbus->sn_humanio_demu:sn_humanio_demu sn_humanio_rbus sn_humanio_rbus CLK RB_SRES RESET SWI CE_MSEC BTN RB_MREQ O_LED LED O_ANO_N DSP_DAT O_SEG_N DSP_DP I_SWI I_BTN sn_humanio_rbus:sn_humanio_rbus->sn_humanio:sn_humanio sys_tst_fx2loop_n2 sys_tst_fx2loop_n2 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FX2_IFCLK O_MEM_BE_N I_FX2_FLAG O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_FLA_CE_N O_FX2_FIFO O_FX2_SLRD_N O_FX2_SLWR_N O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA sys_tst_fx2loop_n2:sys_tst_fx2loop_n2->clkdivce:clkdivce sys_tst_fx2loop_n2:sys_tst_fx2loop_n2->dcm_sfs:dcm_sfs sys_tst_fx2loop_n2:sys_tst_fx2loop_n2->fx2_2fifoctl_ic:fx2_2fifoctl_ic sys_tst_fx2loop_n2:sys_tst_fx2loop_n2->fx2_3fifoctl_ic:fx2_3fifoctl_ic sys_tst_fx2loop_n2:sys_tst_fx2loop_n2->nx_cram_dummy:nx_cram_dummy sys_tst_fx2loop_n2:sys_tst_fx2loop_n2->sn_humanio:sn_humanio tst_fx2loop_hiomap tst_fx2loop_hiomap CLK HIO_CNTL RESET LED HIO_STAT DSP_DAT FX2_MONI DSP_DP SWI BTN sys_tst_fx2loop_n2:sys_tst_fx2loop_n2->tst_fx2loop_hiomap:tst_fx2loop_hiomap tst_fx2loop tst_fx2loop CLK HIO_STAT RESET RXHOLD CE_MSEC TXDATA HIO_CNTL TXENA FX2_MONI TX2DATA RXDATA TX2ENA RXVAL TXBUSY TX2BUSY sys_tst_fx2loop_n2:sys_tst_fx2loop_n2->tst_fx2loop:tst_fx2loop tst_fx2loop:tst_fx2loop->byte2word:byte2word word2byte word2byte CLK BUSY RESET DO DI VAL ENA ODD HOLD tst_fx2loop:tst_fx2loop->word2byte:word2byte sys_tst_fx2loop_n3 sys_tst_fx2loop_n3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FX2_IFCLK O_MEM_BE_N I_FX2_FLAG O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_PPCM_CE_N O_PPCM_RST_N O_FX2_FIFO O_FX2_SLRD_N O_FX2_SLWR_N O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA sys_tst_fx2loop_n3:sys_tst_fx2loop_n3->clkdivce:clkdivce sys_tst_fx2loop_n3:sys_tst_fx2loop_n3->fx2_2fifoctl_ic:fx2_2fifoctl_ic sys_tst_fx2loop_n3:sys_tst_fx2loop_n3->fx2_3fifoctl_ic:fx2_3fifoctl_ic sys_tst_fx2loop_n3:sys_tst_fx2loop_n3->nx_cram_dummy:nx_cram_dummy sys_tst_fx2loop_n3:sys_tst_fx2loop_n3->s6_cmt_sfs:s6_cmt_sfs sys_tst_fx2loop_n3:sys_tst_fx2loop_n3->sn_humanio:sn_humanio sys_tst_fx2loop_n3:sys_tst_fx2loop_n3->tst_fx2loop_hiomap:tst_fx2loop_hiomap sys_tst_fx2loop_n3:sys_tst_fx2loop_n3->tst_fx2loop:tst_fx2loop sys_tst_rlink_arty sys_tst_rlink_arty I_CLK100 O_TXD I_RXD O_LED I_SWI O_RGBLED0 I_BTN O_RGBLED1 A_VPWRP O_RGBLED2 A_VPWRN O_RGBLED3 sys_tst_rlink_arty:sys_tst_rlink_arty->bp_rs232_2line_iob:bp_rs232_2line_iob sys_tst_rlink_arty:sys_tst_rlink_arty->bp_swibtnled:bp_swibtnled sys_tst_rlink_arty:sys_tst_rlink_arty->clkdivce:clkdivce sys_tst_rlink_arty:sys_tst_rlink_arty->rb_sres_or_4:rb_sres_or_4 sys_tst_rlink_arty:sys_tst_rlink_arty->rb_sres_or_3:rb_sres_or_3 sys_tst_rlink_arty:sys_tst_rlink_arty->rbd_tst_rlink:rbd_tst_rlink sys_tst_rlink_arty:sys_tst_rlink_arty->rgbdrv_analog_rbus:rgbdrv_analog_rbus sys_tst_rlink_arty:sys_tst_rlink_arty->rgbdrv_master:rgbdrv_master sys_tst_rlink_arty:sys_tst_rlink_arty->rlink_sp1c:rlink_sp1c sys_tst_rlink_arty:sys_tst_rlink_arty->s7_cmt_sfs:s7_cmt_sfs sysmonx_rbus_arty sysmonx_rbus_arty CLK RB_SRES RESET ALM RB_MREQ OT VPWRN TEMP VPWRP sys_tst_rlink_arty:sys_tst_rlink_arty->sysmonx_rbus_arty:sysmonx_rbus_arty sysmon_rbus_core sysmon_rbus_core CLK RB_SRES RESET SM_DEN RB_MREQ SM_DWE SM_DO SM_DADDR SM_DRDY SM_DI SM_EOS SM_RESET SM_ALM TEMP SM_OT SM_JTAGBUSY SM_JTAGLOCKED SM_JTAGMODIFIED sysmonx_rbus_arty:sysmonx_rbus_arty->sysmon_rbus_core:sysmon_rbus_core sys_tst_rlink_b3 sys_tst_rlink_b3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N sys_tst_rlink_b3:sys_tst_rlink_b3->bp_rs232_2line_iob:bp_rs232_2line_iob sys_tst_rlink_b3:sys_tst_rlink_b3->clkdivce:clkdivce sys_tst_rlink_b3:sys_tst_rlink_b3->rb_sres_or_3:rb_sres_or_3 sys_tst_rlink_b3:sys_tst_rlink_b3->rbd_tst_rlink:rbd_tst_rlink sys_tst_rlink_b3:sys_tst_rlink_b3->rlink_sp1c:rlink_sp1c sys_tst_rlink_b3:sys_tst_rlink_b3->s7_cmt_sfs:s7_cmt_sfs sys_tst_rlink_b3:sys_tst_rlink_b3->sn_humanio_rbus:sn_humanio_rbus sysmonx_rbus_base sysmonx_rbus_base CLK RB_SRES RESET ALM RB_MREQ OT TEMP sys_tst_rlink_b3:sys_tst_rlink_b3->sysmonx_rbus_base:sysmonx_rbus_base sysmonx_rbus_base:sysmonx_rbus_base->sysmon_rbus_core:sysmon_rbus_core sys_tst_rlink_cuff_atlys sys_tst_rlink_cuff_atlys I_CLK100 O_USB_TXD I_USB_RXD O_HIO_LED I_HIO_SWI O_FUSP_RTS_N I_HIO_BTN O_FUSP_TXD I_FUSP_CTS_N O_FX2_FIFO I_FUSP_RXD O_FX2_SLRD_N I_FX2_IFCLK O_FX2_SLWR_N I_FX2_FLAG O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA sys_tst_rlink_cuff_atlys:sys_tst_rlink_cuff_atlys->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_rlink_cuff_atlys:sys_tst_rlink_cuff_atlys->clkdivce:clkdivce sys_tst_rlink_cuff_atlys:sys_tst_rlink_cuff_atlys->dcm_sfs:dcm_sfs sys_tst_rlink_cuff_atlys:sys_tst_rlink_cuff_atlys->fx2_2fifoctl_ic:fx2_2fifoctl_ic sys_tst_rlink_cuff_atlys:sys_tst_rlink_cuff_atlys->fx2_3fifoctl_ic:fx2_3fifoctl_ic sys_tst_rlink_cuff_atlys:sys_tst_rlink_cuff_atlys->sn_humanio_demu_rbus:sn_humanio_demu_rbus tst_rlink_cuff tst_rlink_cuff CLK RB_MREQ_TOP RESET LED CE_USEC DSP_DAT CE_MSEC DSP_DP RB_SRES_TOP TXSD SWI RTS_N BTN FX2_RXHOLD RXSD FX2_TXDATA CTS_N FX2_TXENA FX2_RXDATA FX2_TX2DATA FX2_RXVAL FX2_TX2ENA FX2_TXBUSY FX2_TX2BUSY FX2_MONI sys_tst_rlink_cuff_atlys:sys_tst_rlink_cuff_atlys->tst_rlink_cuff:tst_rlink_cuff tst_rlink_cuff:tst_rlink_cuff->led_pulse_stretch:led_pulse_stretch tst_rlink_cuff:tst_rlink_cuff->rb_sres_or_2:rb_sres_or_2 tst_rlink_cuff:tst_rlink_cuff->rbd_tst_rlink:rbd_tst_rlink tst_rlink_cuff:tst_rlink_cuff->rlink_core8:rlink_core8 tst_rlink_cuff:tst_rlink_cuff->rlink_rlbmux:rlink_rlbmux tst_rlink_cuff:tst_rlink_cuff->serport_1clock:serport_1clock sys_tst_rlink_cuff_n2 sys_tst_rlink_cuff_n2 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N I_FX2_IFCLK O_MEM_OE_N I_FX2_FLAG O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_FLA_CE_N O_FUSP_RTS_N O_FUSP_TXD O_FX2_FIFO O_FX2_SLRD_N O_FX2_SLWR_N O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA sys_tst_rlink_cuff_n2:sys_tst_rlink_cuff_n2->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_rlink_cuff_n2:sys_tst_rlink_cuff_n2->clkdivce:clkdivce sys_tst_rlink_cuff_n2:sys_tst_rlink_cuff_n2->dcm_sfs:dcm_sfs sys_tst_rlink_cuff_n2:sys_tst_rlink_cuff_n2->fx2_2fifoctl_ic:fx2_2fifoctl_ic sys_tst_rlink_cuff_n2:sys_tst_rlink_cuff_n2->fx2_3fifoctl_ic:fx2_3fifoctl_ic sys_tst_rlink_cuff_n2:sys_tst_rlink_cuff_n2->nx_cram_dummy:nx_cram_dummy sys_tst_rlink_cuff_n2:sys_tst_rlink_cuff_n2->sn_humanio_rbus:sn_humanio_rbus sys_tst_rlink_cuff_n2:sys_tst_rlink_cuff_n2->tst_rlink_cuff:tst_rlink_cuff sys_tst_rlink_cuff_n3 sys_tst_rlink_cuff_n3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N I_FX2_IFCLK O_MEM_OE_N I_FX2_FLAG O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_PPCM_CE_N O_PPCM_RST_N O_FUSP_RTS_N O_FUSP_TXD O_FX2_FIFO O_FX2_SLRD_N O_FX2_SLWR_N O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA sys_tst_rlink_cuff_n3:sys_tst_rlink_cuff_n3->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_rlink_cuff_n3:sys_tst_rlink_cuff_n3->clkdivce:clkdivce sys_tst_rlink_cuff_n3:sys_tst_rlink_cuff_n3->fx2_2fifoctl_ic:fx2_2fifoctl_ic sys_tst_rlink_cuff_n3:sys_tst_rlink_cuff_n3->fx2_3fifoctl_ic:fx2_3fifoctl_ic sys_tst_rlink_cuff_n3:sys_tst_rlink_cuff_n3->nx_cram_dummy:nx_cram_dummy sys_tst_rlink_cuff_n3:sys_tst_rlink_cuff_n3->s6_cmt_sfs:s6_cmt_sfs sys_tst_rlink_cuff_n3:sys_tst_rlink_cuff_n3->sn_humanio_rbus:sn_humanio_rbus sys_tst_rlink_cuff_n3:sys_tst_rlink_cuff_n3->tst_rlink_cuff:tst_rlink_cuff sys_tst_rlink_n2 sys_tst_rlink_n2 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_FLA_CE_N O_FUSP_RTS_N O_FUSP_TXD sys_tst_rlink_n2:sys_tst_rlink_n2->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_rlink_n2:sys_tst_rlink_n2->clkdivce:clkdivce sys_tst_rlink_n2:sys_tst_rlink_n2->dcm_sfs:dcm_sfs sys_tst_rlink_n2:sys_tst_rlink_n2->nx_cram_dummy:nx_cram_dummy sys_tst_rlink_n2:sys_tst_rlink_n2->rb_sres_or_2:rb_sres_or_2 sys_tst_rlink_n2:sys_tst_rlink_n2->rbd_tst_rlink:rbd_tst_rlink sys_tst_rlink_n2:sys_tst_rlink_n2->rlink_sp1c:rlink_sp1c sys_tst_rlink_n2:sys_tst_rlink_n2->sn_humanio_rbus:sn_humanio_rbus sys_tst_rlink_n3 sys_tst_rlink_n3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_PPCM_CE_N O_PPCM_RST_N O_FUSP_RTS_N O_FUSP_TXD sys_tst_rlink_n3:sys_tst_rlink_n3->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_rlink_n3:sys_tst_rlink_n3->clkdivce:clkdivce sys_tst_rlink_n3:sys_tst_rlink_n3->nx_cram_dummy:nx_cram_dummy sys_tst_rlink_n3:sys_tst_rlink_n3->rb_sres_or_2:rb_sres_or_2 sys_tst_rlink_n3:sys_tst_rlink_n3->rbd_tst_rlink:rbd_tst_rlink sys_tst_rlink_n3:sys_tst_rlink_n3->rlink_sp1c:rlink_sp1c sys_tst_rlink_n3:sys_tst_rlink_n3->s6_cmt_sfs:s6_cmt_sfs sys_tst_rlink_n3:sys_tst_rlink_n3->sn_humanio_rbus:sn_humanio_rbus sys_tst_rlink_n4 sys_tst_rlink_n4 I_CLK100 O_TXD I_RXD O_RTS_N I_CTS_N O_LED I_SWI O_RGBLED0 I_BTN O_RGBLED1 I_BTNRST_N O_ANO_N O_SEG_N sys_tst_rlink_n4:sys_tst_rlink_n4->bp_rs232_4line_iob:bp_rs232_4line_iob sys_tst_rlink_n4:sys_tst_rlink_n4->clkdivce:clkdivce sys_tst_rlink_n4:sys_tst_rlink_n4->rb_sres_or_4:rb_sres_or_4 sys_tst_rlink_n4:sys_tst_rlink_n4->rb_sres_or_2:rb_sres_or_2 sys_tst_rlink_n4:sys_tst_rlink_n4->rbd_tst_rlink:rbd_tst_rlink sys_tst_rlink_n4:sys_tst_rlink_n4->rgbdrv_analog_rbus:rgbdrv_analog_rbus sys_tst_rlink_n4:sys_tst_rlink_n4->rgbdrv_master:rgbdrv_master sys_tst_rlink_n4:sys_tst_rlink_n4->rlink_sp1c:rlink_sp1c sys_tst_rlink_n4:sys_tst_rlink_n4->s7_cmt_sfs:s7_cmt_sfs sys_tst_rlink_n4:sys_tst_rlink_n4->sn_humanio_rbus:sn_humanio_rbus sys_tst_rlink_n4:sys_tst_rlink_n4->sysmonx_rbus_base:sysmonx_rbus_base sys_tst_rlink_s3 sys_tst_rlink_s3 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_FUSP_CTS_N O_MEM_CE_N I_FUSP_RXD O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADDR IO_MEM_DATA O_FUSP_RTS_N O_FUSP_TXD sys_tst_rlink_s3:sys_tst_rlink_s3->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_rlink_s3:sys_tst_rlink_s3->clkdivce:clkdivce sys_tst_rlink_s3:sys_tst_rlink_s3->rb_sres_or_2:rb_sres_or_2 sys_tst_rlink_s3:sys_tst_rlink_s3->rbd_tst_rlink:rbd_tst_rlink sys_tst_rlink_s3:sys_tst_rlink_s3->rlink_sp1c:rlink_sp1c sys_tst_rlink_s3:sys_tst_rlink_s3->s3_sram_dummy:s3_sram_dummy sys_tst_rlink_s3:sys_tst_rlink_s3->sn_humanio_rbus:sn_humanio_rbus sys_tst_serloop1_n2 sys_tst_serloop1_n2 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_FLA_CE_N O_FUSP_RTS_N O_FUSP_TXD sys_tst_serloop1_n2:sys_tst_serloop1_n2->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_serloop1_n2:sys_tst_serloop1_n2->clkdivce:clkdivce sys_tst_serloop1_n2:sys_tst_serloop1_n2->nx_cram_dummy:nx_cram_dummy sys_tst_serloop1_n2:sys_tst_serloop1_n2->serport_1clock:serport_1clock sys_tst_serloop1_n2:sys_tst_serloop1_n2->sn_humanio:sn_humanio tst_serloop_hiomap tst_serloop_hiomap CLK HIO_CNTL RESET LED HIO_STAT DSP_DAT SER_MONI DSP_DP SWI BTN sys_tst_serloop1_n2:sys_tst_serloop1_n2->tst_serloop_hiomap:tst_serloop_hiomap tst_serloop tst_serloop CLK HIO_STAT RESET RXHOLD CE_MSEC TXDATA HIO_CNTL TXENA SER_MONI RXDATA RXVAL TXBUSY sys_tst_serloop1_n2:sys_tst_serloop1_n2->tst_serloop:tst_serloop sys_tst_serloop1_n3 sys_tst_serloop1_n3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_PPCM_CE_N O_PPCM_RST_N O_FUSP_RTS_N O_FUSP_TXD sys_tst_serloop1_n3:sys_tst_serloop1_n3->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_serloop1_n3:sys_tst_serloop1_n3->clkdivce:clkdivce sys_tst_serloop1_n3:sys_tst_serloop1_n3->nx_cram_dummy:nx_cram_dummy sys_tst_serloop1_n3:sys_tst_serloop1_n3->serport_1clock:serport_1clock sys_tst_serloop1_n3:sys_tst_serloop1_n3->sn_humanio:sn_humanio sys_tst_serloop1_n3:sys_tst_serloop1_n3->tst_serloop_hiomap:tst_serloop_hiomap sys_tst_serloop1_n3:sys_tst_serloop1_n3->tst_serloop:tst_serloop sys_tst_serloop1_n4 sys_tst_serloop1_n4 I_CLK100 O_TXD I_RXD O_RTS_N I_CTS_N O_LED I_SWI O_RGBLED0 I_BTN O_RGBLED1 I_BTNRST_N O_ANO_N O_SEG_N sys_tst_serloop1_n4:sys_tst_serloop1_n4->bp_rs232_4line_iob:bp_rs232_4line_iob sys_tst_serloop1_n4:sys_tst_serloop1_n4->clkdivce:clkdivce sys_tst_serloop1_n4:sys_tst_serloop1_n4->serport_1clock:serport_1clock sys_tst_serloop1_n4:sys_tst_serloop1_n4->sn_humanio:sn_humanio sys_tst_serloop1_n4:sys_tst_serloop1_n4->tst_serloop_hiomap:tst_serloop_hiomap sys_tst_serloop1_n4:sys_tst_serloop1_n4->tst_serloop:tst_serloop sys_tst_serloop2_n2 sys_tst_serloop2_n2 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_FLA_CE_N O_FUSP_RTS_N O_FUSP_TXD sys_tst_serloop2_n2:sys_tst_serloop2_n2->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_serloop2_n2:sys_tst_serloop2_n2->clkdivce:clkdivce sys_tst_serloop2_n2:sys_tst_serloop2_n2->dcm_sfs:dcm_sfs sys_tst_serloop2_n2:sys_tst_serloop2_n2->nx_cram_dummy:nx_cram_dummy sys_tst_serloop2_n2:sys_tst_serloop2_n2->serport_2clock:serport_2clock sys_tst_serloop2_n2:sys_tst_serloop2_n2->sn_humanio:sn_humanio sys_tst_serloop2_n2:sys_tst_serloop2_n2->tst_serloop_hiomap:tst_serloop_hiomap sys_tst_serloop2_n2:sys_tst_serloop2_n2->tst_serloop:tst_serloop sys_tst_serloop_s3 sys_tst_serloop_s3 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_FUSP_CTS_N O_MEM_CE_N I_FUSP_RXD O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADDR IO_MEM_DATA O_FUSP_RTS_N O_FUSP_TXD sys_tst_serloop_s3:sys_tst_serloop_s3->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_tst_serloop_s3:sys_tst_serloop_s3->clkdivce:clkdivce sys_tst_serloop_s3:sys_tst_serloop_s3->dcm_sfs:dcm_sfs sys_tst_serloop_s3:sys_tst_serloop_s3->serport_1clock:serport_1clock sys_tst_serloop_s3:sys_tst_serloop_s3->s3_sram_dummy:s3_sram_dummy sys_tst_serloop_s3:sys_tst_serloop_s3->sn_humanio:sn_humanio sys_tst_serloop_s3:sys_tst_serloop_s3->tst_serloop_hiomap:tst_serloop_hiomap sys_tst_serloop_s3:sys_tst_serloop_s3->tst_serloop:tst_serloop sys_tst_snhumanio_atlys sys_tst_snhumanio_atlys I_CLK100 O_USB_TXD I_USB_RXD O_HIO_LED I_HIO_SWI O_FUSP_RTS_N I_HIO_BTN O_FUSP_TXD I_FUSP_CTS_N I_FUSP_RXD sys_tst_snhumanio_atlys:sys_tst_snhumanio_atlys->clkdivce:clkdivce sys_tst_snhumanio_atlys:sys_tst_snhumanio_atlys->sn_humanio_demu:sn_humanio_demu tst_snhumanio tst_snhumanio CLK LED RESET DSP_DAT CE_MSEC DSP_DP SWI BTN sys_tst_snhumanio_atlys:sys_tst_snhumanio_atlys->tst_snhumanio:tst_snhumanio sys_tst_snhumanio_b3 sys_tst_snhumanio_b3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N sys_tst_snhumanio_b3:sys_tst_snhumanio_b3->clkdivce:clkdivce sys_tst_snhumanio_b3:sys_tst_snhumanio_b3->sn_humanio:sn_humanio sys_tst_snhumanio_b3:sys_tst_snhumanio_b3->tst_snhumanio:tst_snhumanio sys_tst_snhumanio_n2 sys_tst_snhumanio_n2 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_FLA_CE_N sys_tst_snhumanio_n2:sys_tst_snhumanio_n2->clkdivce:clkdivce sys_tst_snhumanio_n2:sys_tst_snhumanio_n2->nx_cram_dummy:nx_cram_dummy sys_tst_snhumanio_n2:sys_tst_snhumanio_n2->sn_humanio:sn_humanio sys_tst_snhumanio_n2:sys_tst_snhumanio_n2->tst_snhumanio:tst_snhumanio sys_tst_snhumanio_n3 sys_tst_snhumanio_n3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_PPCM_CE_N O_PPCM_RST_N sys_tst_snhumanio_n3:sys_tst_snhumanio_n3->clkdivce:clkdivce sys_tst_snhumanio_n3:sys_tst_snhumanio_n3->nx_cram_dummy:nx_cram_dummy sys_tst_snhumanio_n3:sys_tst_snhumanio_n3->sn_humanio:sn_humanio sys_tst_snhumanio_n3:sys_tst_snhumanio_n3->tst_snhumanio:tst_snhumanio sys_tst_snhumanio_n4 sys_tst_snhumanio_n4 I_CLK100 O_TXD I_RXD O_RTS_N I_CTS_N O_LED I_SWI O_RGBLED0 I_BTN O_RGBLED1 I_BTNRST_N O_ANO_N O_SEG_N sys_tst_snhumanio_n4:sys_tst_snhumanio_n4->clkdivce:clkdivce sys_tst_snhumanio_n4:sys_tst_snhumanio_n4->sn_humanio:sn_humanio sys_tst_snhumanio_n4:sys_tst_snhumanio_n4->tst_snhumanio:tst_snhumanio sys_tst_snhumanio_s3 sys_tst_snhumanio_s3 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N O_MEM_CE_N O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADDR IO_MEM_DATA sys_tst_snhumanio_s3:sys_tst_snhumanio_s3->clkdivce:clkdivce sys_tst_snhumanio_s3:sys_tst_snhumanio_s3->s3_sram_dummy:s3_sram_dummy sys_tst_snhumanio_s3:sys_tst_snhumanio_s3->sn_humanio:sn_humanio sys_tst_snhumanio_s3:sys_tst_snhumanio_s3->tst_snhumanio:tst_snhumanio sys_w11a_b3 sys_w11a_b3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N sys_w11a_b3:sys_w11a_b3->bp_rs232_2line_iob:bp_rs232_2line_iob sys_w11a_b3:sys_w11a_b3->clkdivce:clkdivce sys_w11a_b3:sys_w11a_b3->ibdr_maxisys:ibdr_maxisys sys_w11a_b3:sys_w11a_b3->ioleds_sp1c:ioleds_sp1c sys_w11a_b3:sys_w11a_b3->pdp11_bram_memctl:pdp11_bram_memctl sys_w11a_b3:sys_w11a_b3->pdp11_hio70:pdp11_hio70 sys_w11a_b3:sys_w11a_b3->pdp11_sys70:pdp11_sys70 sys_w11a_b3:sys_w11a_b3->rb_sres_or_3:rb_sres_or_3 sys_w11a_b3:sys_w11a_b3->rlink_sp1c:rlink_sp1c sys_w11a_b3:sys_w11a_b3->s7_cmt_sfs:s7_cmt_sfs sys_w11a_b3:sys_w11a_b3->sn_humanio_rbus:sn_humanio_rbus sys_w11a_b3:sys_w11a_b3->sysmonx_rbus_base:sysmonx_rbus_base sys_w11a_br_arty sys_w11a_br_arty I_CLK100 O_TXD I_RXD O_LED I_SWI O_RGBLED0 I_BTN O_RGBLED1 A_VPWRN O_RGBLED2 A_VPWRP O_RGBLED3 sys_w11a_br_arty:sys_w11a_br_arty->bp_rs232_2line_iob:bp_rs232_2line_iob sys_w11a_br_arty:sys_w11a_br_arty->bp_swibtnled:bp_swibtnled sys_w11a_br_arty:sys_w11a_br_arty->clkdivce:clkdivce sys_w11a_br_arty:sys_w11a_br_arty->ibdr_maxisys:ibdr_maxisys sys_w11a_br_arty:sys_w11a_br_arty->ioleds_sp1c:ioleds_sp1c sys_w11a_br_arty:sys_w11a_br_arty->pdp11_bram_memctl:pdp11_bram_memctl sys_w11a_br_arty:sys_w11a_br_arty->pdp11_hio70_arty:pdp11_hio70_arty sys_w11a_br_arty:sys_w11a_br_arty->pdp11_sys70:pdp11_sys70 sys_w11a_br_arty:sys_w11a_br_arty->rb_sres_or_2:rb_sres_or_2 sys_w11a_br_arty:sys_w11a_br_arty->rgbdrv_3x4mux:rgbdrv_3x4mux sys_w11a_br_arty:sys_w11a_br_arty->rlink_sp1c:rlink_sp1c sys_w11a_br_arty:sys_w11a_br_arty->s7_cmt_sfs:s7_cmt_sfs sys_w11a_br_arty:sys_w11a_br_arty->sysmonx_rbus_arty:sysmonx_rbus_arty sys_w11a_n2 sys_w11a_n2 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N I_FX2_IFCLK O_MEM_OE_N I_FX2_FLAG O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_FLA_CE_N O_FUSP_RTS_N O_FUSP_TXD O_FX2_FIFO O_FX2_SLRD_N O_FX2_SLWR_N O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA sys_w11a_n2:sys_w11a_n2->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_w11a_n2:sys_w11a_n2->clkdivce:clkdivce sys_w11a_n2:sys_w11a_n2->dcm_sfs:dcm_sfs sys_w11a_n2:sys_w11a_n2->ibdr_maxisys:ibdr_maxisys sys_w11a_n2:sys_w11a_n2->ioleds_sp1c_fx2:ioleds_sp1c_fx2 sys_w11a_n2:sys_w11a_n2->nx_cram_memctl_as:nx_cram_memctl_as sys_w11a_n2:sys_w11a_n2->pdp11_hio70:pdp11_hio70 sys_w11a_n2:sys_w11a_n2->pdp11_sys70:pdp11_sys70 sys_w11a_n2:sys_w11a_n2->rlink_sp1c_fx2:rlink_sp1c_fx2 sys_w11a_n2:sys_w11a_n2->sn_humanio_rbus:sn_humanio_rbus sys_w11a_n3 sys_w11a_n3 I_CLK100 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_MEM_WAIT O_MEM_CE_N I_FUSP_CTS_N O_MEM_BE_N I_FUSP_RXD O_MEM_WE_N I_FX2_IFCLK O_MEM_OE_N I_FX2_FLAG O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA O_PPCM_CE_N O_PPCM_RST_N O_FUSP_RTS_N O_FUSP_TXD O_FX2_FIFO O_FX2_SLRD_N O_FX2_SLWR_N O_FX2_SLOE_N O_FX2_PKTEND_N IO_FX2_DATA sys_w11a_n3:sys_w11a_n3->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_w11a_n3:sys_w11a_n3->clkdivce:clkdivce sys_w11a_n3:sys_w11a_n3->ibdr_maxisys:ibdr_maxisys sys_w11a_n3:sys_w11a_n3->ioleds_sp1c_fx2:ioleds_sp1c_fx2 sys_w11a_n3:sys_w11a_n3->nx_cram_memctl_as:nx_cram_memctl_as sys_w11a_n3:sys_w11a_n3->pdp11_hio70:pdp11_hio70 sys_w11a_n3:sys_w11a_n3->pdp11_sys70:pdp11_sys70 sys_w11a_n3:sys_w11a_n3->rlink_sp1c_fx2:rlink_sp1c_fx2 sys_w11a_n3:sys_w11a_n3->s6_cmt_sfs:s6_cmt_sfs sys_w11a_n3:sys_w11a_n3->sn_humanio_rbus:sn_humanio_rbus sys_w11a_n4 sys_w11a_n4 I_CLK100 O_TXD I_RXD O_RTS_N I_CTS_N O_LED I_SWI O_RGBLED0 I_BTN O_RGBLED1 I_BTNRST_N O_ANO_N I_MEM_WAIT O_SEG_N O_MEM_CE_N O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA sys_w11a_n4:sys_w11a_n4->bp_rs232_4line_iob:bp_rs232_4line_iob sys_w11a_n4:sys_w11a_n4->clkdivce:clkdivce sys_w11a_n4:sys_w11a_n4->ibdr_maxisys:ibdr_maxisys sys_w11a_n4:sys_w11a_n4->ioleds_sp1c:ioleds_sp1c sys_w11a_n4:sys_w11a_n4->nx_cram_memctl_as:nx_cram_memctl_as sys_w11a_n4:sys_w11a_n4->pdp11_hio70:pdp11_hio70 sys_w11a_n4:sys_w11a_n4->pdp11_sys70:pdp11_sys70 sys_w11a_n4:sys_w11a_n4->rb_sres_or_3:rb_sres_or_3 sys_w11a_n4:sys_w11a_n4->rlink_sp1c:rlink_sp1c sys_w11a_n4:sys_w11a_n4->s7_cmt_sfs:s7_cmt_sfs sys_w11a_n4:sys_w11a_n4->sn_humanio_rbus:sn_humanio_rbus sys_w11a_n4:sys_w11a_n4->sysmonx_rbus_base:sysmonx_rbus_base sys_w11a_s3 sys_w11a_s3 I_CLK50 O_TXD I_RXD O_LED I_SWI O_ANO_N I_BTN O_SEG_N I_FUSP_CTS_N O_MEM_CE_N I_FUSP_RXD O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADDR IO_MEM_DATA O_FUSP_RTS_N O_FUSP_TXD sys_w11a_s3:sys_w11a_s3->bp_rs232_2l4l_iob:bp_rs232_2l4l_iob sys_w11a_s3:sys_w11a_s3->clkdivce:clkdivce sys_w11a_s3:sys_w11a_s3->ibdr_maxisys:ibdr_maxisys sys_w11a_s3:sys_w11a_s3->ioleds_sp1c:ioleds_sp1c sys_w11a_s3:sys_w11a_s3->pdp11_hio70:pdp11_hio70 sys_w11a_s3:sys_w11a_s3->pdp11_sys70:pdp11_sys70 sys_w11a_s3:sys_w11a_s3->rb_sres_or_2:rb_sres_or_2 sys_w11a_s3:sys_w11a_s3->rlink_sp1c:rlink_sp1c sys_w11a_s3:sys_w11a_s3->s3_sram_memctl:s3_sram_memctl sys_w11a_s3:sys_w11a_s3->sn_humanio_rbus:sn_humanio_rbus tb_arty_core tb_arty_core I_SWI I_BTN tb_basys3_core tb_basys3_core I_SWI I_BTN tb_nexys2_core tb_nexys2_core O_MEM_CE_N I_SWI O_MEM_BE_N I_BTN O_MEM_WE_N I_MEM_WAIT O_MEM_OE_N IO_MEM_DATA O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR tb_nexys2_core:tb_nexys2_core->mt45w8mw16b:mt45w8mw16b tb_nexys3_core tb_nexys3_core O_MEM_CE_N I_SWI O_MEM_BE_N I_BTN O_MEM_WE_N I_MEM_WAIT O_MEM_OE_N IO_MEM_DATA O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR tb_nexys3_core:tb_nexys3_core->mt45w8mw16b:mt45w8mw16b tb_nexys4_core tb_nexys4_core I_SWI I_BTN I_BTNRST_N tb_s3board_core tb_s3board_core O_MEM_CE_N I_SWI O_MEM_BE_N I_BTN O_MEM_WE_N IO_MEM_DATA O_MEM_OE_N O_MEM_ADDR tb_s3board_core:tb_s3board_core->is61lv25616al:is61lv25616al tb_tst_serloop tb_tst_serloop CLKS CLK_STOP CLKH P0_RXD P0_TXD P0_CTS_N P0_RTS_N P1_RXD P1_TXD P1_CTS_N P1_RTS_N SWI BTN tb_tst_serloop:tb_tst_serloop->simclkcnt:simclkcnt tb_tst_serloop:tb_tst_serloop->serport_xontx:serport_xontx tb_tst_serloop:tb_tst_serloop->serport_uart_rxtx:serport_uart_rxtx tbcore_rlink tbcore_rlink CLK CLK_STOP RX_HOLD RX_DATA TX_DATA RX_VAL TX_ENA tbcore_rlink:tbcore_rlink->simclkcnt:simclkcnt tbcore_rlink:tbcore_rlink->rlink_cext_iface:rlink_cext_iface tbd_cdata2byte tbd_cdata2byte CLK C2B_BUSY RESET C2B_DO C2B_ESCXON C2B_VAL C2B_ESCFILL B2C_BUSY C2B_DI B2C_DO C2B_ENA B2C_VAL B2C_HOLD tbd_cdata2byte:tbd_cdata2byte->byte2cdata:byte2cdata tbd_cdata2byte:tbd_cdata2byte->cdata2byte:cdata2byte tbd_nx_cram_memctl_as tbd_nx_cram_memctl_as CLK BUSY RESET ACK_R REQ ACK_W WE ACT_R ADDR ACT_W BE DO DI O_MEM_CE_N I_MEM_WAIT O_MEM_BE_N O_MEM_WE_N O_MEM_OE_N O_MEM_ADV_N O_MEM_CLK O_MEM_CRE O_MEM_ADDR IO_MEM_DATA tbd_nx_cram_memctl_as:tbd_nx_cram_memctl_as->nx_cram_memctl_as:nx_cram_memctl_as tbd_pdp11core tbd_pdp11core CLK CP_STAT_cmdbusy RESET CP_STAT_cmdack CP_CNTL_req CP_STAT_cmderr CP_CNTL_func CP_STAT_cmdmerr CP_CNTL_rnum CP_STAT_cpugo CP_ADDR_addr CP_STAT_cpustep CP_ADDR_racc CP_STAT_cpuwait CP_ADDR_be CP_STAT_cpususp CP_ADDR_ena_22bit CP_STAT_cpurust CP_ADDR_ena_ubmap CP_STAT_suspint CP_DIN CP_STAT_suspext CP_DOUT tbd_pdp11core:tbd_pdp11core->clkdivce:clkdivce tbd_pdp11core:tbd_pdp11core->ibdr_minisys:ibdr_minisys tbd_pdp11core:tbd_pdp11core->pdp11_bram:pdp11_bram tbd_pdp11core:tbd_pdp11core->pdp11_core:pdp11_core tbd_pdp11core:tbd_pdp11core->pdp11_tmu_sb:pdp11_tmu_sb tbd_rlink_direct tbd_rlink_direct CLK RL_BUSY CE_INT RL_DO CE_USEC RL_VAL RESET RB_MREQ_aval RL_DI RB_MREQ_re RL_ENA RB_MREQ_we RL_HOLD RB_MREQ_initt RB_SRES_ack RB_MREQ_addr RB_SRES_busy RB_MREQ_din RB_SRES_err TXRXACT RB_SRES_dout RB_LAM RB_STAT tbd_rlink_direct:tbd_rlink_direct->rlink_core:rlink_core tbd_rlink_sp1c tbd_rlink_sp1c CLK RL_BUSY CE_INT RL_DO CE_USEC RL_VAL RESET RB_MREQ_aval RL_DI RB_MREQ_re RL_ENA RB_MREQ_we RL_HOLD RB_MREQ_initt RB_SRES_ack RB_MREQ_addr RB_SRES_busy RB_MREQ_din RB_SRES_err TXRXACT RB_SRES_dout RB_LAM RB_STAT tbd_rlink_sp1c:tbd_rlink_sp1c->byte2cdata:byte2cdata tbd_rlink_sp1c:tbd_rlink_sp1c->cdata2byte:cdata2byte tbd_rlink_sp1c:tbd_rlink_sp1c->simclkcnt:simclkcnt tbd_rlink_sp1c:tbd_rlink_sp1c->serport_uart_rx:serport_uart_rx tbd_rlink_sp1c:tbd_rlink_sp1c->serport_uart_tx:serport_uart_tx tbu_rlink_sp1c tbu_rlink_sp1c CLK TXSD CE_INT RTS_N CE_USEC RB_MREQ_aval CE_MSEC RB_MREQ_re RESET RB_MREQ_we RXSD RB_MREQ_initt CTS_N RB_MREQ_addr RB_SRES_ack RB_MREQ_din RB_SRES_busy RB_SRES_err RB_SRES_dout RB_LAM RB_STAT tbd_rlink_sp1c:tbd_rlink_sp1c->tbu_rlink_sp1c:tbu_rlink_sp1c tbu_rlink_sp1c:tbu_rlink_sp1c->rlink_sp1c:rlink_sp1c tbd_serport_autobaud tbd_serport_autobaud CLK CE_USEC RESET CE_MSEC RXSD CLKDIV ABACT ABDONE RXDATA RXVAL RXERR RXACT TXSD2 RXDATA3 RXVAL3 RXERR3 RXACT3 tbd_serport_autobaud:tbd_serport_autobaud->clkdivce:clkdivce tbd_serport_autobaud:tbd_serport_autobaud->serport_uart_autobaud:serport_uart_autobaud tbd_serport_autobaud:tbd_serport_autobaud->serport_uart_rxtx:serport_uart_rxtx tbd_serport_uart_rx tbd_serport_uart_rx CLK RXDATA RESET RXVAL CLKDIV RXERR RXSD RXACT tbd_serport_uart_rx:tbd_serport_uart_rx->serport_uart_rx:serport_uart_rx tbd_serport_uart_rxtx tbd_serport_uart_rxtx CLK RXDATA RESET RXVAL CLKDIV RXERR RXSD RXACT TXDATA TXSD TXENA TXBUSY tbd_serport_uart_rxtx:tbd_serport_uart_rxtx->serport_uart_rxtx:serport_uart_rxtx