1 -- $Id: sys_conf.vhd 649 2015-02-21 21:10:16Z mueller $
3 -- Copyright 2012- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
5 -- This program is free software; you may redistribute and/or modify it under
6 -- the terms of the GNU General Public License as published by the Free
7 -- Software Foundation, either version 2, or at your option any later version.
9 -- This program is distributed in the hope that it will be useful, but
10 -- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
11 -- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 -- for complete details.
14 ------------------------------------------------------------------------------
15 -- Package Name: sys_conf
16 -- Description: Definitions for sys_tst_fx2loop_ic_n2 (for synthesis)
19 -- Tool versions: xst 13.3-14.7; ghdl 0.29-0.31
21 -- Date Rev Version Comment
22 -- 2012-01-15 453 1.0 Initial version
23 ------------------------------------------------------------------------------
26 use ieee.std_logic_1164.
all;
37 -- dummy values defs for generic parameters of as controller
44 -- pktend timer setting
45 -- petowidth=10 -> 2^10 30 MHz clocks -> ~33 usec (normal operation)
positive :=1 sys_conf_fx2_rdpwldelay
positive :=1 sys_conf_fx2_flagdelay
positive :=1 sys_conf_fx2_wrpwldelay
string :="ic2" sys_conf_fx2_type
positive :=5 sys_conf_fx2_ccwidth
positive :=10 sys_conf_fx2_petowidth
integer :=(50000000 / sys_conf_clkfx_divide) * sys_conf_clkfx_multiply sys_conf_clksys
positive :=2 sys_conf_clkfx_multiply
positive :=1 sys_conf_fx2_wrpwhdelay
positive :=1 sys_conf_clkfx_divide
integer :=sys_conf_clksys / 1000000 sys_conf_clksys_mhz
boolean :=true sys_conf_hio_debounce
positive :=1 sys_conf_fx2_rdpwhdelay